Asus PRIME Z270-AR PRIME_Z270-A_AR_BIOS ManualEnglish - Page 23

DRAM WRITE to READ Delay L

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DRAM Refresh Interval Configuration options: [Auto] [1] - [65535] DRAM WRITE Recovery Time Configuration options: [Auto] [1] - [31] DRAM READ to PRE Time Configuration options: [Auto] [1] - [15] DRAM FOUR ACT WIN Time Configuration options: [Auto] [1] - [63] DRAM WRITE to READ Delay Configuration options: [Auto] [1] - [15] DRAM WRITE to READ Delay L Configuration options: [Auto] [1] - [15] DRAM WRITE to READ Delay S Configuration options: [Auto] [1] - [15] DRAM CKE Minimum Pulse Width Configuration options: [Auto] [0] - [15] DRAM Write Latency Configuration options: [Auto] [1] - [31] Skew Control ODT RTT WR (CHA) Configuration options: [Auto] [0 DRAM CLOCK] [80 DRAM CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK] [255 DRAM CLOCK] ODT RTT PARK (CHA) Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK] [40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK] ODT RTT NOM (CHA) Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK] [40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK] ODT RTT WR (CHB) Configuration options: [Auto] [0 DRAM CLOCK] [80 DRAM CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK] [255 DRAM CLOCK] ODT RTT PARK (CHB) Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK] [40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK] ODT RTT NOM (CHB) Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK] [40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK] ASUS PRIME Z270-A/AR Series BIOS Manual 23

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ASUS PRIME Z270-A/AR Series BIOS Manual
23
DRAM Refresh Interval
Configuration options: [Auto] [1] – [65535]
DRAM WRITE Recovery Time
Configuration options: [Auto] [1] – [31]
DRAM READ to PRE Time
Configuration options: [Auto] [1] – [15]
DRAM FOUR ACT WIN Time
Configuration options: [Auto] [1] – [63]
DRAM WRITE to READ Delay
Configuration options: [Auto] [1] – [15]
DRAM WRITE to READ Delay L
Configuration options: [Auto] [1] – [15]
DRAM WRITE to READ Delay S
Configuration options: [Auto] [1] – [15]
DRAM CKE Minimum Pulse Width
Configuration options: [Auto] [0] – [15]
DRAM Write Latency
Configuration options: [Auto] [1] – [31]
Skew Control
ODT RTT WR (CHA)
Configuration options: [Auto] [0 DRAM CLOCK] [80 DRAM CLOCK] [120
DRAM CLOCK] [240 DRAM CLOCK] [255 DRAM CLOCK]
ODT RTT PARK (CHA)
Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK]
[40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM
CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK]
ODT RTT NOM (CHA)
Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK]
[40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM
CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK]
ODT RTT WR (CHB)
Configuration options: [Auto] [0 DRAM CLOCK] [80 DRAM CLOCK] [120
DRAM CLOCK] [240 DRAM CLOCK] [255 DRAM CLOCK]
ODT RTT PARK (CHB)
Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK]
[40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM
CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK]
ODT RTT NOM (CHB)
Configuration options: [Auto] [0 DRAM CLOCK] [34 DRAM CLOCK]
[40 DRAM CLOCK] [48 DRAM CLOCK] [60 DRAM CLOCK] [80 DRAM
CLOCK] [120 DRAM CLOCK] [240 DRAM CLOCK]