Foxconn Quantumian1 User Manual - Page 41
Quantum BIOS, ► Host Clock Multiplier, ► CPU BclockFSB
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Quantum BIOS Aptio Setup Utility - C opyright (C) 2011 American Megatrends, Inc. Main Advanced Quantum BIOS Boot Security Save & Exit Quantum BIOS Configuration Host Clock Multiplier CPU Bclock (FSB) Set the host clock multiplier [1 s e t t i n g 100.0 MHz] ▶ CPU Configuration ▶ Memory Configuration ▶ Voltage Configuration 3 → ← : Select Screen ↑ ↓ : Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc. ► Host Clock Multiplier This item allows you to set the host clock multiplier. ► CPU Bclock(FSB) This item is used to set the ratio between CPU Core Clock and the FSB Frequency. You can modify the value by pressing / key. The default value is [100 MHz]. ► CPU Configuration / Memory Configuration / Voltage Configuration Press to go to relative submenu. CPU Configuration Aptio Setup Utility - C opyright (C) 2011 American Megatrends, Inc. Quantum BIOS CPU Configuration ▶ CPU Information Specific CPU Information Hyper-threading Active Processor Cores CPU Internal PLL Overvoltage VID Override for Max Turbo Ratio IA Core Current Max(1/8 Amp) Enhanced Intel SpeedStep Technolog Turbo Mode Power Limit 1 Value (1/8 Watt) Power Limit 2 Value (1/8 Watt) 1 Core Ratio Limit 2 Core Ratio Limit 3 Core Ratio Limit 4 Core Ratio Limit 5 Core Ratio Limit 6 Core Ratio Limit Non Turbo Ratio Override Limit CPUID Maximum Execute Disabled Bit Server Class Hardware Prefetcher Adjacent Cache Line Prefetch [Enabled] [All] [Disabled] 0 1080 [Enabled] [Enabled] 1040 1300 38 38 37 36 35 35 32 [Disabled] [Enabled] [Custom] [Enabled] [Enabled] → ← : Select Screen ↑ ↓ : Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save & Exit ESC: Exit Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc. ► Hyper-threading Hyper-Threading Technology allows one physical processor package to be perceived as two 34