Hitachi 7K400 Specifications - Page 48
Multi word DMA timings
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UPC - 000053412935
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6.7 Multi word DMA timings The Multiword DMA timings meet Mode 2 of the ATA/ATAPI-6 description. Table 24: Multiword DMA cycle timing chart CS0-/CS1- tM tN DMARQ tLR/tLW DMACK- tJ t0 DIOR-/DIOWREAD DATA WRITE DATA tI tD tKR/tKW tE tG tF tZ tG tH Table 25: Multiword DMA cycle timings PARAMETER DESCRIPTION t0 Cycle time tD DIOR-/DIOW- asserted pulse width tE DIOR- data access tF DIOR- data hold tG DIOR-/DIOW- data setup tH DIOW- data hold tI DMACK- to -DIOR-/DIOW- setup tJ DIOR-/DIOW- to DMACK- hold tKR/tKW DIOR-/DIOW- negated pulse width tLR/tLW DIOR-/DIOW- to DMARQ- delay tM CS (1:0) valid to DIOR-/DIOWtN CS (1:0) tZ DMACK- to read data released MIN (ns) 120 70 - 5 20 10 0 5 25 - 25 10 - MAX (ns) - - 50 35 25 Deskstar 7K400 Hard Disk Drive Specification 34
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