Intel D915GUX Product Specification - Page 49

Technical Reference

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2 Technical Reference What This Chapter Contains 2.1 Introduction ...49 2.2 Memory Resources ...49 2.3 DMA Channels ...51 2.4 Fixed I/O Map...52 2.5 PCI Configuration Space Map 53 2.6 Interrupts ...54 2.7 PCI Conventional Interrupt Routing Map 55 2.8 Connectors...56 2.9 Jumper Block ...67 2.10 Mechanical Considerations 68 2.11 Electrical Considerations 70 2.12 Thermal Considerations 72 2.13 Reliability ...74 2.14 Environmental ...74 2.15 Regulatory Compliance 75 2.1 Introduction Sections 2.2 - 2.6 contain several standalone tables. Table 10 describes the system memory map, Table 11 lists the DMA channels, Table 12 shows the I/O map, Table 13 defines the PCI Conventional bus configuration space map, and Table 14 describes the interrupts. The remaining sections in this chapter are introduced by text found with their respective section headings. 2.2 Memory Resources 2.2.1 Addressable Memory The board utilizes 4 GB of addressable system memory. Typically the address space that is allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (firmware hub), and chipset overhead resides above the top of DRAM (total system memory). On a system that has 4 GB of system memory installed, it is not possible to use all of the installed memory due to system address space being allocated for other system critical functions. These functions include the following: • BIOS/firmware hub (2 MB) • Local APIC (19 MB) • Digital Media Interface (40 MB) • Front side bus interrupts (17 MB) • PCI Express configuration space (256 MB) • MCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB) 49

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49
2
Technical Reference
What This Chapter Contains
2.1
Introduction
................................................................................................................
49
2.2
Memory Resources
....................................................................................................
49
2.3
DMA Channels
...........................................................................................................
51
2.4
Fixed I/O Map
.............................................................................................................
52
2.5
PCI Configuration Space Map
....................................................................................
53
2.6
Interrupts
....................................................................................................................
54
2.7
PCI Conventional Interrupt Routing Map
....................................................................
55
2.8
Connectors
.................................................................................................................
56
2.9
Jumper Block
.............................................................................................................
67
2.10
Mechanical Considerations
.........................................................................................
68
2.11
Electrical Considerations
............................................................................................
70
2.12
Thermal Considerations
.............................................................................................
72
2.13 Reliability
....................................................................................................................
74
2.14 Environmental
............................................................................................................
74
2.15
Regulatory Compliance
..............................................................................................
75
2.1 Introduction
Sections 2.2 - 2.6 contain several standalone tables.
Table 10 describes the system memory map,
Table 11 lists the DMA channels, Table 12 shows the I/O map, Table 13 defines the PCI
Conventional bus configuration space map, and Table 14 describes the interrupts.
The remaining
sections in this chapter are introduced by text found with their respective section headings.
2.2
Memory Resources
2.2.1
Addressable Memory
The board utilizes 4 GB of addressable system memory.
Typically the address space that is
allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS
(firmware hub), and chipset overhead resides above the top of DRAM (total system memory).
On
a system that has 4 GB of system memory installed, it is not possible to use all of the installed
memory due to system address space being allocated for other system critical functions.
These
functions include the following:
•
BIOS/firmware hub (2 MB)
•
Local APIC (19 MB)
•
Digital Media Interface (40 MB)
•
Front side bus interrupts (17 MB)
•
PCI Express configuration space (256 MB)
•
MCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB)