Intel DQ965CO DQ965CO Technical Product Specification - Page 31

Parallel IDE Interface - raid

Page 31 highlights

Product Description NOTE Many Serial ATA drives use new low-voltage power connectors and require adaptors or power supplies equipped with low-voltage power connectors. For more information, see: http://www.serialata.org/ For information about The location of the Serial ATA connectors Refer to Figure 16, page 58 1.7.3.2 Serial ATA RAID The ICH8DO supports the following RAID (Redundant Array of Independent Drives) levels: • RAID 0 - data striping • RAID 1 - data mirroring • RAID 0+1 (or RAID 10) - data striping and mirroring • RAID 5 - distributed parity 1.7.4 Parallel IDE Interface The Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface. The Parallel ATA IDE interface supports the following modes: • Programmed I/O (PIO): processor controls data transfer. • 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec. • Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 33 MB/sec. • ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible. • ATA-100: DMA protocol on IDE bus allows host and target throttling. The ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to 88 MB/sec. • ATA-133: DMA protocol on IDE bus allows host and target throttling. The ATA-133 logic is designed to achieve read transfer rates up to 133 MB/sec and write transfer rates in excess of 100 MB/sec. NOTE ATA-66, ATA-100, and ATA-133 are faster timings and require a specialized cable to reduce reflections, noise, and inductive coupling. The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives) and ATA devices. The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS) translation modes. The drive reports the transfer rate and translation mode to the BIOS. For information about The location of the Parallel ATA IDE connector Refer to Figure 16, page 58 31

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Product Description
31
±
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or
power supplies equipped with low-voltage power connectors.
For more information, see:
For information about
Refer to
The location of the Serial ATA connectors
Figure 16, page 58
1.7.3.2
Serial ATA RAID
The ICH8DO supports the following RAID (Redundant Array of Independent Drives)
levels:
RAID 0
- data striping
RAID 1
- data mirroring
RAID 0+1 (or RAID 10)
- data striping and mirroring
RAID 5
- distributed parity
1.7.4
Parallel IDE Interface
The Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface.
The
Parallel ATA IDE interface supports the following modes:
Programmed I/O (PIO):
processor controls data transfer.
8237-style DMA:
DMA offloads the processor, supporting transfer rates of up to
16 MB/sec.
Ultra DMA:
DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 33 MB/sec.
ATA-66:
DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 66 MB/sec.
ATA-66 protocol is similar to Ultra DMA and is
device driver compatible.
ATA-100:
DMA protocol on IDE bus allows host and target throttling.
The ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up
to 88 MB/sec.
ATA-133:
DMA protocol on IDE bus allows host and target throttling.
The ATA-133
logic is designed to achieve read transfer rates up to 133 MB/sec and write transfer
rates in excess of 100 MB/sec.
±
NOTE
ATA-66, ATA-100, and ATA-133 are faster timings and require a specialized cable to
reduce reflections, noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives)
and ATA devices.
The BIOS supports Logical Block Addressing (LBA) and Extended
Cylinder Head Sector (ECHS) translation modes.
The drive reports the transfer rate
and translation mode to the BIOS.
For information about
Refer to
The location of the Parallel ATA IDE connector
Figure 16, page 58