Intel DQ965CO DQ965CO Technical Product Specification - Page 49

Technical Reference

Page 49 highlights

2 Technical Reference What This Chapter Contains 2.1 Memory Map 49 2.2 DMA Channels 51 2.3 Fixed I/O Map 52 2.4 PCI Configuration Space Map 53 2.5 Interrupts 54 2.6 PCI Interrupt Routing Map 55 2.7 Connectors and Headers 56 2.8 Jumper Block 67 2.9 Mechanical Considerations 68 2.10 Electrical Considerations 71 2.11 Thermal Considerations 73 2.12 Reliability 75 2.13 Environmental 76 2.1 Memory Map 2.1.1 Addressable Memory The board utilizes 8 GB of addressable system memory. Typically the address space that is allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (SPI Flash), and chipset overhead resides above the top of DRAM (total system memory). On a system that has 8 GB of system memory installed, it is not possible to use all of the installed memory due to system address space being allocated for other system critical functions. These functions include the following: • BIOS/ SPI Flash (16 Mbits) • Local APIC (19 MB) • Digital Media Interface (40 MB) • Front side bus interrupts (17 MB) • PCI Express configuration space (256 MB) • GMCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB) • Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI Express add-in cards • Manageability Engine support (6 MB) • Base graphics memory support (1 MB or 8 MB) 49

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102

49
2
Technical Reference
What This Chapter Contains
2.1
Memory Map
...................................................................................
49
2.2
DMA Channels
.................................................................................
51
2.3
Fixed I/O Map
.................................................................................
52
2.4
PCI Configuration Space Map
............................................................
53
2.5
Interrupts
......................................................................................
54
2.6
PCI Interrupt Routing Map
................................................................
55
2.7
Connectors and Headers
...................................................................
56
2.8
Jumper Block
..................................................................................
67
2.9
Mechanical Considerations
................................................................
68
2.10
Electrical Considerations
...................................................................
71
2.11
Thermal Considerations
....................................................................
73
2.12
Reliability
.......................................................................................
75
2.13
Environmental
................................................................................
76
2.1
Memory Map
2.1.1
Addressable Memory
The board utilizes 8 GB of addressable system memory.
Typically the address space
that is allocated for PCI Conventional bus add-in cards, PCI Express configuration
space, BIOS (SPI Flash), and chipset overhead resides above the top of DRAM (total
system memory).
On a system that has 8 GB of system memory installed, it is not
possible to use all of the installed memory due to system address space being
allocated for other system critical functions.
These functions include the following:
BIOS/ SPI Flash (16 Mbits)
Local APIC (19 MB)
Digital Media Interface (40 MB)
Front side bus interrupts (17 MB)
PCI Express configuration space (256 MB)
GMCH base address registers, internal graphics ranges, PCI Express ports (up to
512 MB)
Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI
Express add-in cards
Manageability Engine support (6 MB)
Base graphics memory support (1 MB or 8 MB)