Intel SC5300BD2 Product Specification - Page 64

The GEM424 controller implements SAF-TE over the HBA

Page 64 highlights

Intel® Server Chassis SC5300 5U Kit TPS Hard Disk Drive Bays 5.2.1 Enclosure Management Controller The QLogic* GEM424 is an enclosure management controller for the SATA/SAS backplane and monitors various aspects of a storage enclosure. The chip provides out-of-band SAF-TE management through the SATA/SAS Host I2C interface. The GEM424 controller also supports the IPMI specification by providing management data to a baseboard management controller through the IPMB. The GEM424 has general input and output pins (GPIO) that allow customization. These GPIOs are used for hardware drive detection and driving FAULT and ACTIVITY LEDs. The GEM424 controller comes in an 80-pin Thin Quad Flat Pack (TQFP) package and operates from the 3.3V rail with an input clock frequency of 20MHz. 5.2.2 SATA/SAS Interface The GEM424 controller implements SAF-TE over the HBA I2C interface. The GEM424 controller supports the following SAF-TE Command Set: • Read Enclosure Configuration • Read Enclosure Status • Read Device Slot Status • Read Global Flags • Write Device Slot Status • Perform Slot Operation 5.2.3 I2C Serial Bus Interface The GEM424 controller supports two independent I2C interface ports with bus speeds of up to 400Kbits. The I2C core incorporates 8-bit FIFOs for data transfer buffering. The I2C bus supports National* LM75 or equivalent I2C -based temperature sensors. This enables actual temperature value readings to be returned to the host. The Intelligent Platform Management Bus (IPMB) is supported through I2C port 0. The following figure provides a block diagram of the I2C bus connection implemented on the 6HDD SATA/SAS HSBP. Revision 1.31 63

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Intel® Server Chassis SC5300 5U Kit TPS
Hard Disk Drive Bays
Revision 1.31
63
5.2.1
Enclosure Management Controller
The QLogic* GEM424 is an enclosure management controller for the SATA/SAS backplane and
monitors various aspects of a storage enclosure.
The chip provides out-of-band SAF-TE
management through the SATA/SAS Host I
2
C interface.
The GEM424 controller also supports
the IPMI specification by providing management data to a baseboard management controller
through the IPMB.
The GEM424 has general input and output pins (GPIO) that allow customization.
These GPIOs
are used for hardware drive detection and driving FAULT and ACTIVITY LEDs.
The GEM424 controller comes in an 80-pin Thin Quad Flat Pack (TQFP) package and operates
from the 3.3V rail with an input clock frequency of 20MHz.
5.2.2
SATA/SAS Interface
The GEM424 controller implements SAF-TE over the HBA I
2
C interface.
The GEM424
controller supports the following SAF-TE Command Set:
Read Enclosure Configuration
Read Enclosure Status
Read Device Slot Status
Read Global Flags
Write Device Slot Status
Perform Slot Operation
5.2.3
I
2
C Serial Bus Interface
The GEM424 controller supports two independent I
2
C interface ports with bus speeds of up to
400Kbits.
The I
2
C core incorporates 8-bit FIFOs for data transfer buffering.
The I
2
C bus
supports National* LM75 or equivalent I
2
C -based temperature sensors.
This enables actual
temperature value readings to be returned to the host.
The Intelligent Platform Management
Bus (IPMB) is supported through I
2
C port 0.
The following figure provides a block diagram of the I
2
C bus connection implemented on the
6HDD SATA/SAS HSBP.