Lenovo NetVista Technical information manual for NetVista 6269, 6568, 6569, 65 - Page 47
bit PCI connectors, Table 21. System memory connector pin input/output
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Table 21. System memory connector pin input/output Pin Signal name I/O Pin Signal name 54 Ground 55 MD16 N/A 110 VDD I/O 111 CAS# 56 MD17 I/O 112 DQMB4# I/O Pin Signal name I/O N/A 166 SA1 O N/A 167 SA0 O I 168 VDD N/A 32-bit PCI connectors A1 A2 A62 B1 B62 B2 Table 22. PCI connector-pin assignments Pin Signal I/O Pin Signal I/O A1 TRST# O B1 −12 V dc A2 +12 V dc B2 TCK O A3 TMS O B3 Ground A4 TDI O B4 TDO I A5 +5 V dc B5 +5 V dc A6 INTA# I B6 +5 V dc A7 INTC# I B7 INTB# I A8 +5 V dc A9 Reserved B8 INTD# I B9 PRSNT1# I A10 +5 V dc B10 Reserved A11 Reserved B11 PRSNT2# I A12 Ground B12 Ground A13 Ground A14 3.3 V AUX B13 Ground B14 3.3 V AUX A15 RST# O B15 Ground A16 +5 V dc (I/O) B16 CLK O A17 GNT# O B17 Ground A18 Ground B18 REQ# I A19 PCI PME B19 +5 V dc A20 Address/data 30 I/O B20 Address/data 31 I/O A21 +3.3 V dc B21 Address/data 29 I/O A22 Address/data 28 I/O B22 Ground A23 Address/data 26 I/O B23 Address/data 27 I/O A24 Ground I/O B24 Address/data 25 Appendix A. Connector-pin assignments 37
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