Lenovo PC 300PL Techical Information Manual - Page 47

Appendix B. System address maps Figure 37 (Page 2 of 2). DMA I/O address map Address (hex) Description 00CA Channel 6, Transfer Count register 00CC Channel 7, Memory Address register 00CE Channel 7, Transfer Count register 00D0 Channels 4-7, Read Status/Write Command register 00D2 Channels 4-7, Write Request register 00D4 Channels 4-7, Write Single Mask register bit 00D6 Channels 4-7, Mode register (write) 00D8 Channels 4-7, Clear byte pointer (write) 00DA Channels 4-7, Master clear (write)/temp (read) 00DC Channels 4-7, Clear Mask register (write) 00DE Channels 4-7, Write All Mask register bits 00DF Channels 5-7, 8- or 16-bit mode select Bits 00-15 00-15 00-15 00-07 00-02 00-02 00-07 N/A 00-07 00-03 00-03 00-07 Byte pointer Yes Yes Yes PCI configuration space map Bus number (hex) 00 00 00 00 00 00 00 02 Device number (hex) 00 01 1E 1F 1F 1F 1F X Function number (hex) 00 00 0 01 02 0 5 00 Description Intel 84440BX (host bridge) Intel 84440BX (PCI/AGP) Intel 82371AB Hub interface to PCI bridge registers Intel 82371AB IDE bus master Intel 82371AB USB Intel 82371AB Interface bridge registers AC '97 audio controller PCI connectors 2 Upper byte of memory address register. Appendix B. System address maps 39