Asus PRL-DLS PRL-DLS User Manual - Page 58
POST Code < 0Eh >
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POST Code < 0Dh > 1. Programed CPU MTRR. Measure CPU speed and save CPU speed. 2. Initialized the video, whether it is mono, color or EGA/VGA. After initialize, shrink the VGA BIOS. 3. If no video found in this stage, beep a warning sound. POST Code < 0Eh > 1. Set A20 on. 2. Showed HP Logo or Award Logo 3. Showed CPU type on screen. POST Code < 14h > 1. Test 8254 Channel 2. POST Code < 18h > 1. Test 8259 functionality. POST Code < 30h > 1. Disabled D0/D1 command to KBC, wait for command accepted. 2. Special KBC Initialization (set KBC to PS2 mode). 3. Sizing base memory (0-640K) and extended memory starting at just over the 1M boundary. Will continue until fail to read what was written or come to the 3GB boundary. POST Code < 31h > 1. Set CPU MTRR for address above 1MB. 2. Cleared base memory. 3. Build UMB structure. 4. Initialized USB. 5. Erased all of memory above 1MB if QUICK_POST is disabled. POST Code < 32h > 1. Displayed AWARD PNP message. (Award_PnP_Msg) 2. Initialized onboard SuperIO. a. Early IDE chip initialize. b. Programed SuperIO chip. 2-30 Chapter 2: Hardware information