Asus RS100-E11-PI2 RS100-E10-PI2 User Manual - Page 98
Power & Performance, CPU - Power Management Control
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5.5.2 Power & Performance CPU - Power Management Control Boot performance mode [Turbo Performance] This item allows you to select the performance state that the BIOS will set starting from reset vector. Configuration options: [Max Battery] [Max Non-Turbo Performance] [Turbo Performance] Intel(R) SpeedStep(tm) [Enabled] Allows more than two frequency ranges to be supported. Configuration options: [Disabled] [Enabled] Race To Halt (RTH) [Enabled] Allows you to enable or disable Race To Halt feature. RTH dynamically increases the CPU frequency to quickly enter the package C-State and reduce the overall power. RTH is controlled through MSR 1FC bit 20. Configuration options: [Disabled] [Enabled] Intel(R) Speed Shift Technology [Native Mode] Allows you to enable or disable Intel(R) Speed Shift Technology support. Enabling will expose the CPPC v2 interface to allow for hardware controlled P-states. Configuration options: [Disabled] [Native Mode] [Out of Band Mode] The following items appear only when Intel(R) Speed Shift Technology is set to [Disabled] or [Native Mode]. Per Core P State OS control mode [Enabled] Allows you to enable or disable Per Core P state OS control mode. Disabling will set Bit 31 = 1 command 0x06. When set the highest core request is used for all other core requests. Configuration options: [Disabled] [Enabled] HwP Autonomous Per Core P State [Enabled] [Disabled] Disable Autonomous PCPS (Bit 30 = 1, command 0x11). Autonomous will request the same value for all cores all the time. [Enabled] Enable PCPS (default Bit 30 = 0, command 0x11). HwP Fast MSR Support [Enabled] Allows you to enable or disable HwP Fast MSR Support for IA32_HWP_REQUEST MSR. Configuration options: [Disabled] [Enabled] 5-16 Chapter 5: BIOS Setup