Fluke 123B/S Service Manual - Page 40

CHAGATE control signal, 3V3GAR Voltage, Fly Back Converter, FET V554 off.

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123/124 Service Manual loading C503 and C555 just after connecting the power adapter) via its internal Control circuit. CHAGATE control signal To make the FET conductive its Vgs (gate-source voltage) must be negative. For that purpose, the CHAGATE voltage must be negative with respect to VCHDRIVE. The P-ASIC voltage VCHDRIVE also limits the swing of the CHAGATE signal to 13V. VCHDRIVE VCHDRIVE -13V 10 µs Figure 3-4. CHAGATE Control Voltage V506 "OFF" V506 "ON" +3V3GAR Voltage When the test tool is not turned on, the Fly Back Converter does not run. In this situation, the +3V3GAR voltage for the D-ASIC, the FlashROM, and the RAM is supplied via transistor V569. The voltage is controlled by the VGARDRV signal supplied by the P-ASIC (pin 69). The current sense voltage across R580 is supplied to pin 70 (VGARCURR). The voltage +3V3GAR is sensed on pin 66 for regulation. The internal regulator in the P-ASIC regulates the +3V3GAR voltage, and limits the current. Fly Back Converter When the test tool is turned on, the D-ASIC makes the PWRONOFF line (P-ASIC pin 62) high. Then the self oscillating Fly Back Converter becomes active. It is started up by the internal 100 kHz oscillator that is also used for the Charger/Converter circuit. First the FLYGATE signal turns FET V554 on (see Figure 3-5), and an increasing current flows in the primary transformer winding to ground, via sense resistor R551. If the voltage FLYSENSP across this resistor exceeds a certain value, the P-ASIC turns FET V554 off. Then a decreasing current flows in the secondary windings to ground. If the windings are "empty" (all energy transferred), the voltage VCOIL sensed by the PASIC (pin 52) is zero, and the FLYGATE signal will turn FET V554 on again. Primary current Secondary current FLYGATE SIGNAL V554 "ON" V554 "OFF" Figure 3-5. Fly-Back Converter Current and Control Voltage The output voltage is regulated by feeding back a part of the +3V3A output voltage via R552-R553-R554 to pin 54 (VSENS). This voltage is referred to a 1.23V reference voltage. Any deviation of the +3V3A voltage from the required 3.3V changes the current level at which current FET V554 will be switched off. If the output voltage increases, the current level at which V554 is switched off will become lower, and less energy is transferred to the secondary winding. As a result the output voltage will become lower. 3-12

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123/124
Service Manual
3-12
loading C503 and C555 just after connecting the power adapter) via its internal Control
circuit.
CHAGATE control signal
To make the FET conductive its Vgs (gate-source voltage) must be negative.
For that
purpose, the CHAGATE voltage must be negative with respect to VCHDRIVE.
The
P-ASIC voltage VCHDRIVE also limits the swing of the CHAGATE signal to 13V.
VCHDRIVE
VCHDRIVE -13V
10
µ
s
V506 “OFF”
V506 “ON”
Figure 3-4. CHAGATE Control Voltage
+3V3GAR Voltage
When the test tool is not turned on, the Fly Back Converter does not run.
In this
situation, the +3V3GAR voltage for the D-ASIC, the FlashROM, and the RAM is
supplied via transistor V569.
The voltage is controlled by the VGARDRV signal
supplied by the P-ASIC (pin 69).
The current sense voltage across R580 is supplied to
pin 70 (VGARCURR).
The voltage +3V3GAR is sensed on pin 66 for regulation.
The
internal regulator in the P-ASIC regulates the +3V3GAR voltage, and limits the current.
Fly Back Converter
When the test tool is turned on, the D-ASIC makes the PWRONOFF line (P-ASIC pin
62) high.
Then the self oscillating Fly Back Converter becomes active.
It is started up
by the internal 100 kHz oscillator that is also used for the Charger/Converter circuit.
First the FLYGATE signal turns FET V554 on (see Figure 3-5), and an increasing
current flows in the primary transformer winding to ground, via sense resistor R551.
If
the voltage FLYSENSP across this resistor exceeds a certain value, the P-ASIC turns
FET V554 off.
Then a decreasing current flows in the secondary windings to ground.
If
the windings are “empty” (all energy transferred), the voltage VCOIL sensed by the P-
ASIC (pin 52) is zero, and the FLYGATE signal will turn FET V554 on again.
Primary current
Secondary current
FLYGATE SIGNAL
V554 “ON”
V554 “OFF”
Figure 3-5. Fly-Back Converter Current and Control Voltage
The output voltage is regulated by feeding back a part of the +3V3A output voltage via
R552-R553-R554 to pin 54 (VSENS).
This voltage is referred to a 1.23V reference
voltage.
Any deviation of the +3V3A voltage from the required 3.3V changes the
current level at which current FET V554 will be switched off.
If the output voltage
increases, the current level at which V554 is switched off will become lower, and less
energy is transferred to the secondary winding.
As a result the output voltage will
become lower.