Fluke 123B/S Service Manual - Page 44

123/124 Service Manual LF input The LF-input (pin 42) is connected to a LF decade attenuator in voltage mode, or to a high impedance buffer for resistance and capacitance measurements. The LF decade attenuator consists of an amplifier with switchable external feedback resistors R131 to R136. Depending on the selected range the LF attenuation factor which will be set to 110-100-1000-10,000. The C-ASIC includes a LF pre-amplifier with switchable gain factors for the 1-2-5 steps. HF input The HF component of the input signal is supplied to four external HF capacitive attenuators via C104 and R108. Depending on the required range, the C-ASIC selects and buffers one of the attenuator outputs :1 (HF0), :10 (HF1), :100 (HF2), or :1000 (HF3). By attenuating the HF3 input internally by a factor 10, the C-ASIC can also create a :10000 attenuation factor. Inputs of not selected input buffers are internally shorted. If required, optional FETs V151-V153 can be installed. They will provide an additional input buffer short for the not-selected buffers, to eliminate internal (in the CASIC) cross talk. To control the DC bias of the buffers inputs, their output voltage is fed back via an internal feed back resistor and external resistors R115, R111/R120, R112, R113, and-R114. The internal feed back resistor and filter R110/C105 will eliminate HF feed back, to obtain a large HF gain. The C-ASIC includes a HF pre-amplifier with switchable gain factors for the 1-2-5 steps. The C-ASIC also includes circuitry to adjust the gain, and pulse response. ADC output pin 27 The combined conditioned HF/LF signal is supplied to the ADC output (pin 27) via an internal ADC buffer. The output voltage is 150 mV/division. The MIDADC signal (pin 28), supplied by the ADC, matches the middle of the C-ASIC output voltage swing to the middle if the ADC input voltage swing. TRIGGER output pin 29 The combined conditioned HF/LF signal is also supplied to the trigger output (pin 29) via an internal trigger buffer. The output voltage is 100 mV/div. This signal (TRIG-A) is supplied to the TRIGGER ASIC for triggering, and time related measurements (See 3.3.4 "Triggering"). For capacitance measurements the ADC output is not used, but the TRIG-A output pulse length indicates the measured capacitance, see "Capacitance measurements" below. GPROT input pin 2 PTC (Positive Temperature Coefficient) resistors (R106-R206) are provided between the Input A and Input B shield ground, and the COM input (instrument ground). This prevents damage to the test tool if the various ground inputs are connected to different voltage levels. The voltage across the PTC resistor is supplied via the GPROT input pin 2 to an input buffer. If this voltage exceeds ±200 mV, the ground protect circuit in the C-ASIC makes the DACTEST output (pin 24) high. The DACTEST line output level is read by the D-ASIC via the slow ADC (See 3.3.2 "Power"). The test tool will give a ground error warning. Because of ground loops, a LF interference voltage can arise across PTC resistor R106 (mainly mains interference when the power adapter is connected). To eliminate this LF interference voltage, it is buffered (also via input GPROT, pin 2), and subtracted from the input signal. Pin 43 (PROTGND) is the ground reference of the input buffer. 3-16