HP A3550A User Manual - A3661-90001 - Page 304

Most Common Microcode Panic Codes Continued

Page 304 highlights

Table 6-14 Most Common Microcode Panic Codes (Continued) Value Description 0x00000008 0x0000000A 0x0000000C 0x0000000E Detection of power line disturbance or software problem. In earlier microcode revisions these panics resulted from detecting power line disturbances. A protection mechanism ensures the integrity of data transfers within the array. If power is determined to be unstable or falls outside tolerance levels, the array initiates a power up sequence and continues processing. In later microcode revisions, a software problem was discovered that violates the hardware's internal protection system. This should not be considered a hardware fault. The SP should not be replaced. The following variations of panic 0x00000008 with the extended status of 3 have also been fixed: - An uninitialized pointer during a synch command. - Aborting a command that has originally generated a retry to a disk that has to be delayed because of the abort. The resources for the command were freed so that when the retry finished, it had no available resources to continue. - An uninitialized pointer within the microcode used during cache synchronization. - During PROM updates (very intermittent). - Pulling a hot spare during an equalize process. - Microcode incorrectly pointing to an internal table structure incorrectly caused a panic with the extended status of 0x000000011. Microcode revision 9.x5 fixes problems that resulted in microcode panics 0x00000008 with an extended status of 0x00000003. All known causes of this panic have been fixed. If this panic occurs, obtain a memory dump and Unsolicited Event Log from both SPs and give them to your Hewlett-Packard service representative. Memory exhausted. An attempt to allocate a memory resource that is required to always be available failed. Rebooting the disk array has been reported to clear the problem. Obtain the Unsolicited Event Log from both SPs and notify your HewlettPackard service representative. Stack overflow. The kernel detected a stack overflow condition. Memory exhausted. 0x00000010 0x00000011 Dual SPs fault simultaneously. It was possible for two SPs configured for write cache array to fault at approximately the same time with SIMM parity error panics. This would happen if the first SP's backend SCSI processor detected a SIMM parity error reading data from SP memory (panic 0x0050300B) while it was moving data to the second SP. The second SP would panic with a 0x00000010 code as it tried to dump cache due to the panic of its peer. The result was a failure to properly dump cache. LUNs that had data in cache at the time of the panic became accessible. Fixed in microcode revision 7.63. Instruction RAM parity error. The hardware detected an unrecovered error in the instruction RAM area. Note that the instruction RAM is not located on the SIMMs. 0x00000012 Data RAM parity error. The hardware has detected an unrecoverable error in the data RAM area. This corresponds to the SIMMs and can occur if the SIMMs are not seated properly or have been handled without following proper ESD procedures. 6-56 Unsolicited Event Log

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6-56
Unsolicited Event Log
0x00000008
Detection of power line disturbance or software problem. In earlier microcode
revisions these panics resulted from detecting power line disturbances. A protection
mechanism ensures the integrity of data transfers within the array. If power is
determined to be unstable or falls outside tolerance levels, the array initiates a power
up sequence and continues processing. In later microcode revisions, a software
problem was discovered that violates the hardware’s internal protection system. This
should not be considered a hardware fault. The SP should not be replaced.
The following variations of panic 0x00000008 with the extended status of 3 have also
been fixed:
An uninitialized pointer during a synch command.
Aborting a command that has originally generated a retry to a disk that has to be
delayed because of the abort. The resources for the command were freed so that
when the retry finished, it had no available resources to continue.
An uninitialized pointer within the microcode used during cache synchronization.
During PROM updates (very intermittent).
Pulling a hot spare during an equalize process.
Microcode incorrectly pointing to an internal table structure incorrectly caused a
panic with the extended status of 0x000000011.
Microcode revision 9.x5 fixes problems that resulted in microcode panics
0x00000008 with an extended status of 0x00000003. All known causes of this panic
have been fixed. If this panic occurs, obtain a memory dump and Unsolicited Event
Log from both SPs and give them to your Hewlett-Packard service representative.
0x0000000A
Memory exhausted. An attempt to allocate a memory resource that is required to
always be available failed. Rebooting the disk array has been reported to clear the
problem. Obtain the Unsolicited Event Log from both SPs and notify your Hewlett-
Packard service representative.
0x0000000C
Stack overflow. The kernel detected a stack overflow condition.
0x0000000E
Memory exhausted.
0x00000010
Dual SPs fault simultaneously. It was possible for two SPs configured for write cache
array to fault at approximately the same time with SIMM parity error panics. This
would happen if the first SP’s backend SCSI processor detected a SIMM parity error
reading data from SP memory (panic 0x0050300B) while it was moving data to the
second SP. The second SP would panic with a 0x00000010 code as it tried to dump
cache due to the panic of its peer. The result was a failure to properly dump cache.
LUNs that had data in cache at the time of the panic became accessible. Fixed in
microcode revision 7.63.
0x00000011
Instruction RAM parity error. The hardware detected an unrecovered error in the
instruction RAM area. Note that the instruction RAM is
not
located on the SIMMs.
0x00000012
Data RAM parity error. The hardware has detected an unrecoverable error in the
data RAM area. This corresponds to the SIMMs and can occur if the SIMMs are not
seated properly or have been handled without following proper ESD procedures.
Table 6-14
Most Common Microcode Panic Codes (Continued)
Value
Description