HP ProLiant BL660c HP BladeSystem c-Class architecture - Page 11

and sharing the traces between different protocols enables an efficient midplane design.

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Table 1. Physical layer of I/O fabrics and their associated encoded bandwidths Interconnect Lanes Number of traces Bandwidth per lane (Gb/s) Aggregate bandwidth (Gb/s) GbE (1000-base-KX) 1x 4 1.25 1.25 10 GbE (10G-base-KX4) 4x 16 3.125 12.5 10 GbE (10G-base-KR) 1x 4 10.3125 10.3125 Fibre Channel (1, 2, 4, 8 Gb) Serial Attached SCSI (3 Gb/s) Serial Attached SCSI (6 Gb/s) InfiniBand InfiniBand Double Data Rate (DDR) InfiniBand Quad Data Rate (QDR) PCI Express PCI Express (generation 2) 1x 1x 1x 4x 4x 4x 1x - -4x 1x - 4x 4 4 4 4 - 16 4 - 16 4 - 16 4 - 16 4 - 16 1.06, 2.12, 4.2, 8.5 3 6 2.5 5 10 2.5 5 1.06, 2.12, 4.2, 8.5 3 6 10 20 40 2.5 - 10 5 - 20 By taking advantage of the similar four-trace, differential SerDes transmit and receive signals, the signal midplane can support either network-semantic protocols (such as Ethernet, Fibre Channel, and InfiniBand) or memory-semantic protocols (PCI Express), using the same signal traces. Consolidating and sharing the traces between different protocols enables an efficient midplane design. Figure 7 illustrates how the physical lanes can be logically overlaid onto sets of four traces. Interfaces such as GbE (1000-base-KX) or Fibre Channel need only a 1x lane (a single set of four traces). Higher bandwidth interfaces, such as InfiniBand, will need to use up to four lanes. Therefore, the choice of network fabrics will dictate whether the interconnect module form factor needs to be single-wide (for a 1x/2x connection) or double-wide (for a 4x connection). Re-using the traces in this manner avoids the problems of having to replicate traces to support each type of fabric on the NonStop signal midplane or of having large numbers of signal pins for the interconnect module connectors. Thus, overlaying the traces simplifies the interconnect module connectors, uses midplane real estate efficiently, and provides flexible connectivity. 11

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Table 1.
Physical layer of I/O fabrics and their associated encoded bandwidths
Interconnect
Lanes
Number
of traces
Bandwidth
per lane
(Gb/s)
Aggregate
bandwidth
(Gb/s)
GbE
(1000-base-KX)
1x
4
1.25
1.25
10 GbE (10G-base-KX4)
4x
16
3.125
12.5
10 GbE (10G-base-KR)
1x
4
10.3125
10.3125
Fibre Channel
(1, 2, 4, 8 Gb)
1x
4
1.06, 2.12,
4.2, 8.5
1.06, 2.12,
4.2, 8.5
Serial Attached SCSI (3 Gb/s)
Serial Attached SCSI (6 Gb/s)
1x
1x
4
4
3
6
3
6
InfiniBand
InfiniBand Double Data Rate (DDR)
InfiniBand Quad Data Rate (QDR)
4x
4x
4x
4 – 16
4 – 16
4 – 16
2.5
5
10
10
20
40
PCI Express
PCI Express (generation 2)
1x – -4x
1x – 4x
4 – 16
4 – 16
2.5
5
2.5 – 10
5 – 20
By taking advantage of the similar four-trace, differential SerDes transmit and receive signals, the
signal midplane can support either network-semantic protocols (such as Ethernet, Fibre Channel, and
InfiniBand) or memory-semantic protocols (PCI Express), using the same signal traces. Consolidating
and sharing the traces between different protocols enables an efficient midplane design. Figure 7
illustrates how the physical lanes can be logically overlaid onto sets of four traces. Interfaces such as
GbE (1000-base-KX) or Fibre Channel need only a 1x lane (a single set of four traces). Higher
bandwidth interfaces, such as InfiniBand, will need to use up to four lanes. Therefore, the choice of
network fabrics will dictate whether the interconnect module form factor needs to be single-wide (for a
1x/2x connection) or double-wide (for a 4x connection).
Re-using the traces in this manner avoids the problems of having to replicate traces to support each
type of fabric on the NonStop signal midplane or of having large numbers of signal pins for the
interconnect module connectors. Thus, overlaying the traces simplifies the interconnect module
connectors, uses midplane real estate efficiently, and provides flexible connectivity.
11