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Intel KD875PBZLKPAK10 Product Specification - Page 52

Fixed I/O Map

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Intel Desktop Board D875PBZ Technical Product Specification 2.4 Fixed I/O Map Table 14. I/O Map Address (hex) 0000 - 00FF Size 256 bytes 0170 - 0177 01F0 - 01F7 0228 - 022F (Note 1) 0278 - 027F (Note 1) 02E8 - 02EF (Note 1) 02F8 - 02FF (Note 1) 0374 - 0377 0378 - 037F 03B0 - 03BB 03C0 - 03DF 03E8 - 03EF 03F0 - 03F5 03F4 - 03F7 03F8 - 03FF 04D0 - 04D1 LPTn + 400 0CF8 - 0CFB (Note 2) 0CF9 (Note 3) 0CFC - 0CFF FFA0 - FFA7 FFA8 - FFAF 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 4 bytes 8 bytes 12 bytes 32 bytes 8 bytes 6 bytes 4 bytes 8 bytes 2 bytes 8 bytes 4 bytes 1 byte 4 bytes 8 bytes 8 bytes Description Used by the Desktop Board D875PBZ. Refer to the ICH5R data sheet for dynamic addressing information Secondary Parallel ATA IDE channel command block Primary Parallel ATA IDE channel command block LPT3 LPT2 COM4 COM2 Secondary Parallel ATA IDE channel control block LPT1 Intel 82875P MCH Intel 82875P MCH COM3 Diskette channel Primary Parallel ATA IDE channel control block COM1 Edge/level triggered PIC ECP port, LPTn base address + 400h PCI configuration address register Reset control register PCI configuration data register Primary Parallel ATA IDE bus master registers Secondary Parallel ATA IDE bus master registers Notes: 1. Default, but can be changed to another address range 2. Dword access only 3. Byte access only For information about ICH5-R addressing Refer to Section 1.2, page 16 52

Section	Page
Intel® Desktop Board D875PBZ Technical Product Specification	1
Revision History / Disclaimer	2
Preface	3
Intended Audience	3
What This Document Contains	3
Typographical Conventions	3
Notes, Cautions, and Warnings	3
Other Common Notation	4
Contents	5
1 Product Description	11
1.1 Overview	12
1.1.1 Feature Summary	12
1.1.2 Manufacturing Options	13
1.1.3 Board Layout	14
1.1.4 Block Diagram	15
1.2 Online Support	16
1.3 Operating System Support	16
1.4 Design Specifications	17
1.5 Processor	20
1.6 System Memory	21
1.6.1 Memory Features	21
1.6.2 Memory Configurations	23
1.7 Intel® 875P Chipset	28
1.7.1 AGP	29
1.7.2 USB	29
1.7.3 IDE Support	30
1.7.4 Real-Time Clock, CMOS SRAM, and Battery	32
1.7.5 Intel® 82802AC Firmware Hub (FWH)	32
1.8 I/O Controller	32
1.8.1 Serial Port	33
1.8.2 Parallel Port	33
1.8.3 Diskette Drive Controller	33
1.8.4 Keyboard and Mouse Interface	33
1.9 Audio Subsystem (Optional)	34
1.9.1 Audio Subsystem Software	34
1.9.2 Intel Flex 6 Audio Subsystem	34
1.9.3 Audio Connectors	36
1.10 LAN Subsystem	37
1.10.1 LAN Subsystem Software	37
1.10.2 Intel® 82547EI Platform LAN Connect Device	37
1.10.3 RJ-45 LAN Connector with Integrated LEDs	37
1.11 Hardware Management Subsystem	38
1.11.1 Hardware Monitoring and Fan Control ASIC	38
1.11.2 Thermal Monitoring	39
1.11.3 Fan Monitoring	40
1.11.4 Chassis Intrusion and Detection	40
1.12 Power Management	40
1.12.1 ACPI	41
1.12.2 Hardware Support	43
2 Technical Reference	49
2.1 Introduction	49
2.2 Memory Resources	49
2.2.1 Addressable Memory	49
2.2.2 Memory Map	51
2.3 DMA Channels	51
2.4 Fixed I/O Map	52
2.5 PCI Configuration Space Map	53
2.6 Interrupts	54
2.7 PCI Interrupt Routing Map	55
2.8 Connectors	57
2.8.1 Back Panel Connectors	58
2.8.2 Internal I/O Connectors	60
2.8.3 External I/O Connectors	68
2.9 Jumper Blocks	72
2.9.1 Front Panel Audio Connector/Jumper Block	72
2.9.2 BIOS Setup Configuration Jumper Block	73
2.10 Mechanical Considerations	74
2.10.1 D875PBZ Form Factor	74
2.10. 2 I/O Shield	75
2.11 Electrical Considerations	77
2.11.1 DC Loading	77
2.11.2 Add-in Board Considerations	77
2.11.3 Fan Connector Current Capability	77
2.11.4 Power Supply Considerations	78
2.12 Thermal Considerations	79
2.13 Reliability	81
2.14 Environmental	81
2.15 Regulatory Compliance	82
2.15.1 Safety Regulations	82
2.15.2 EMC Regulations	82
2.15.3 European Union Declaration of Conformity Statement	83
2.15.4 Product Ecology Statements	83
2.15.5 Product Certification Markings (Board Level)	84
3 Overview of BIOS Features	85
3.1 Introduction	85
3.2 BIOS Flash Memory Organization	85
3.3 Resource Configuration	86
3.3.1 PCI Autoconfiguration	86
3.3.2 PCI IDE Support	86
3.4 System Management BIOS (SMBIOS)	87
3.5 Legacy USB Support	88
3.6 BIOS Updates	88
3.6.1 Language Support	89
3.6.2 Custom Splash Screen	89
3.7 Recovering BIOS Data	89
3.8 Boot Options	90
3.8.1 CD-ROM Boot	90
3.8.2 Network Boot	90
3.8.3 Booting Without Attached Devices	90
3.8.4 Changing the Default Boot Device During POST	91
3.9 Fast Booting Systems with Intel® Rapid BIOS Boot	91
3.9.1 Peripheral Selection and Configuration	91
3.9.2 Intel Rapid BIOS Boot	92
3.10 BIOS Security Features	93
4 BIOS Setup Program	95
4.1 Introduction	95
4.2 Maintenance Menu	96
4.3 Main Menu	97
4.4 Advanced Menu	98
4.4.1 PCI Configuration Submenu	99
4.4.2 Boot Configuration Submenu	100
4.4.3 Peripheral Configuration Submenu	101
4.4.4 Drive Configuration Submenu	103
4.4.5 Floppy Configuration Submenu	107
4.4.6 Event Log Configuration Submenu	108
4.4.7 Video Configuration Submenu	109
4.4.8 USB Configuration Submenu	110
4.4.9 Chipset Configuration Submenu	111
4.4.10 Fan Control Configuration Submenu	114
4.4.11 Hardware Monitoring	115
4.5 Security Menu	116
4.6 Power Menu	117
4.6.1 ACPI Submenu	117
4.7 Boot Menu	118
4.7.1 Boot Device Priority Submenu	119
4.7.2 Hard Disk Drives Submenu	120
4.7.3 Removable Devices Submenu	120
4.7.4 ATAPI CD-ROM Drives Submenu	121
4.8 Exit Menu	121
5 Error Messages and Beep Codes	123
5.1 BIOS Error Messages	123
5.2 Port 80h POST Codes	125
5.3 Bus Initialization Checkpoints	129
5.4 Speaker	130

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Intel Desktop Board D875PBZ Technical Product Specification

2.4 Fixed I/O Map

Table 14.

I/O Map

Address (hex)

Size

Description

0000 - 00FF

256 bytes

Used by the Desktop Board D875PBZ.

Refer to the ICH5-

R data sheet for dynamic addressing information

0170 - 0177

8 bytes

Secondary Parallel ATA IDE channel command block

01F0 - 01F7

8 bytes

Primary Parallel ATA IDE channel command block

0228 - 022F (Note 1)

8 bytes

LPT3

0278 - 027F (Note 1)

8 bytes

LPT2

02E8 - 02EF (Note 1)

8 bytes

COM4

02F8 - 02FF (Note 1)

8 bytes

COM2

0374

–

0377

4 bytes

Secondary Parallel ATA IDE channel control block

0378 - 037F

8 bytes

LPT1

03B0 - 03BB

12 bytes

Intel 82875P MCH

03C0 - 03DF

32 bytes

Intel 82875P MCH

03E8 - 03EF

8 bytes

COM3

03F0 - 03F5

6 bytes

Diskette channel

03F4

–

03F7

4 bytes

Primary Parallel ATA IDE channel control block

03F8 - 03FF

8 bytes

COM1

04D0 - 04D1

2 bytes

Edge/level triggered PIC

LPTn + 400

8 bytes

ECP port, LPTn base address + 400h

0CF8 - 0CFB (Note 2)

4 bytes

PCI configuration address register

0CF9 (Note 3)

1 byte

Reset control register

0CFC - 0CFF

4 bytes

PCI configuration data register

FFA0 - FFA7

8 bytes

Primary Parallel ATA IDE bus master registers

FFA8 - FFAF

8 bytes

Secondary Parallel ATA IDE bus master registers

Notes:

Default, but can be changed to another address range

Dword access only

Byte access only

For information about

Refer to

ICH5-R addressing

Section 1.2, page 16