Intel S845WD1-E Product Guide - Page 87

I/O Map Table 40. I/O Map Address (hex) Size 0000 - 000F 16 bytes 0020 - 0021 2 bytes 0040 - 0043 4 bytes 0060 1 byte 0061 1 byte 0064 1 byte 0070 - 0071 2 bytes 0072 - 0073 2 bytes 0080 - 008F 16 bytes 0092 1 byte 00A0 - 00A1 2 bytes 00B2 - 00B3 2 bytes 00C0 - 00DF 32 bytes 00F0 1 byte 0170 - 0177 8 bytes 01F0 - 01F7 8 bytes 0228 - 022F (Note 1) 8 bytes 0278 - 027F (Note 1) 8 bytes 02E8 - 02EF (Note 1) 8 bytes 02F8 - 02FF (Note 1) 8 bytes 0376 1 byte 0377, bits 6:0 7 bits 0378 - 037F 8 bytes 03B0 - 03BB 12 bytes 03C0 - 03DF 32 bytes 03E8 - 03EF 8 bytes 03F0 - 03F5 6 bytes 0370 - 0375 6 bytes 03F6 1 byte 03F8 - 03FF 8 bytes 04D0 - 04D1 2 bytes LPTn + 400 8 bytes 0CF8 - 0CFB (Note 2) 4 bytes 0CF9 (Note 3) 1 byte 0CFC - 0CFF 4 bytes FFA0 - FFA7 8 bytes Description DMA controller Programmable Interrupt Control (PIC) System timer Keyboard controller byte-reset IRQ System speaker Keyboard controller, CMD/STAT byte System CMOS/Real Time Clock System CMOS DMA controller Fast A20 and PIC PIC APM control DMA Numeric data processor Secondary IDE channel Primary IDE channel LPT3 LPT2 COM4/video (8514A) COM2 Secondary IDE channel command port Secondary IDE channel status port LPT1 Intel 82845 MCH Intel 82845 MCH COM3 Diskette channel 1 Diskette channel 2 Primary IDE channel command port COM1 Edge/level triggered PIC ECP port, LPTn base address + 400h PCI configuration address register Turbo and reset control register PCI configuration data register Primary bus master IDE registers Technical Reference continued 87