ASRock N100M Software/BIOS Setup Guide - Page 34

Initial RTL FIF0 Delay Offset

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Initial RTL FIF0 Delay Offset Configure round trip latency FIF0 delay initial offset. Initial RTL (MC0 C0 A1) Configure round trip latency initial value. Initial RTL (MC0 C1 A1) Configure round trip latency initial value. RTL (MC0 C0 A1) Configure round trip latency. RTL (MC0 C1 A1) Configure round trip latency. ODT Setting Dimm ODT Training Dimm On-Die Termination Training. ODT values will be optimized by this traning. Configuration options: [Auto] [Enabled] [Disabled] ODT WR (A1) Configure the memory on die termination resistors' WR. Configuration options: [Auto] [34] [40] [48] [60] [80] [120] [240] [Disabled] ODT NOM (A1) Configure the memory on die termination resistors' NOM. Configuration options: [Auto] [34] [40] [48] [60] [80] [120] [240] [Disabled] ODT PARK (A1) Configure the memory on die termination resistors' PARK. Configuration options: [Auto] [34] [40] [48] [60] [80] [120] [240] [Disabled] 30

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Initial RTL FIF0 Delay Offset
Configure round trip latency FIF0 delay initial offset.
Initial RTL (MC0 C0 A1)
Configure round trip latency initial value.
Initial RTL (MC0 C1 A1)
Configure round trip latency initial value.
RTL (MC0 C0 A1)
Configure round trip latency.
RTL (MC0 C1 A1)
Configure round trip latency.
ODT Setting
Dimm ODT Training
Dimm On-Die Termination Training. ODT values will be optimized by this traning.
Configuration options: [Auto] [Enabled] [Disabled]
ODT WR (A1)
Configure the memory on die termination resistors' WR.
Configuration options: [Auto] [34] [40] [48] [60] [80] [120] [240] [Disabled]
ODT NOM (A1)
Configure the memory on die termination resistors' NOM.
Configuration options: [Auto] [34] [40] [48] [60] [80] [120] [240] [Disabled]
ODT PARK (A1)
Configure the memory on die termination resistors' PARK.
Configuration options: [Auto] [34] [40] [48] [60] [80] [120] [240] [Disabled]