Asus ROG CROSSHAIR X670E EXTREME ROG CROSSHAIR X670E Series BIOS manual Englis - Page 53

UMC Common Options, Disable DF sync flood propagation, Freeze DF module queues on error, DF Cstates

Page 53 highlights

Disable DF sync flood propagation Disables propagation from PIE to other DF components and eventually to SDP ports. Configuration options: [Sync flood disabled] [Sync flood enabled] [Auto] Freeze DF module queues on error This item allows you to enable or disable freezing of all DF queues on error and also forces a sync flood on HWA even if MCAs are disabled. Configuration options: [Disabled] [Enabled] [Auto] DF Cstates When DF Cstate feature is set to [Enabled], FW programs the registers required to enable this feature is the DF HW. (For [Auto] option, it means this option will synchronize with Global C State). Configuration options: [Disabled] [Enabled] [Auto] PSP error injection support Configuration options: [False] [True] UMC Common Options DDR Options DDR Timing Configuration This item allows you to configure DRAM timing configuration. Damage caused by use of your AMD processor outside of specification or in excess of factory settings are not covered by your system manufacturers warranty. The following items appear only when [Accept] is selected for DRAM Timing Configuration. Active Memory Timing Settings Configuration options: [Auto] [Enabled] Memory Target Speed Specifies the memory target speed in MT/s. The valid input is 2000 MT/s, 2400 MT/s, and range of 3200 MT/s ~ 12000 MT/s (stepping of 200 MT/s). The value is in decimal. The user input value will be rounded down to align with the stepping of 200 MT/s. The maximum speed defined in the JEDEC spec is 8400 MT/s, any input value that is greater than 8400 MT/s will be limited to 8400 MT/s. DDR SPD Timing Tcl Ctrl [Auto] [Manual] Follow default setting. Manually specify. The following item appears only when Tcl Ctrl is set to [Manual]. Tcl Specifies the CAS Latency. Valid values: 0x16 ~ 0x40, with a stepping of 2. The value is in hex. Trcd Ctrl [Auto] [Manual] Follow default setting. Manually specify. ROG CROSSHAIR X670E Series BIOS Manual 53

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102

ROG CROSSHAIR X670E Series BIOS Manual
53
Disable DF sync flood propagation
Disables propagation from PIE to other DF components and eventually to SDP ports.
Configuration options: [Sync flood disabled] [Sync flood enabled] [Auto]
Freeze DF module queues on error
This item allows you to enable or disable freezing of all DF queues on error and also
forces a sync flood on HWA even if MCAs are disabled.
Configuration options: [Disabled] [Enabled] [Auto]
DF Cstates
When DF Cstate feature is set to
[Enabled]
, FW programs the registers required
to enable this feature is the DF HW. (For
[Auto]
option, it means this option will
synchronize with Global C State).
Configuration options: [Disabled] [Enabled] [Auto]
PSP error injection support
Configuration options: [False] [True]
UMC Common Options
DDR Options
DDR Timing Configuration
This item allows you to configure DRAM timing configuration.
Damage caused by use of your AMD processor outside of specification or in excess of
factory settings are not covered by your system manufacturers warranty.
The following items appear only when
[Accept]
is selected for
DRAM Timing
Configuration
.
Active Memory Timing Settings
Configuration options: [Auto] [Enabled]
Memory Target Speed
Specifies the memory target speed in MT/s. The valid input is 2000 MT/s, 2400
MT/s, and range of 3200 MT/s ~ 12000 MT/s (stepping of 200 MT/s). The
value is in decimal. The user input value will be rounded down to align with
the stepping of 200 MT/s. The maximum speed defined in the JEDEC spec
is 8400 MT/s, any input value that is greater than 8400 MT/s will be limited to
8400 MT/s.
DDR SPD Timing
Tcl Ctrl
[Auto]
Follow default setting.
[Manual]
Manually specify.
The following item appears only when
Tcl Ctrl
is set to
[Manual]
.
Tcl
Specifies the CAS Latency. Valid values: 0x16 ~ 0x40, with a stepping
of 2. The value is in hex.
Trcd Ctrl
[Auto]
Follow default setting.
[Manual]
Manually specify.