Asus ROG CROSSHAIR X670E EXTREME ROG CROSSHAIR X670E Series BIOS manual Englis - Page 59

DRAM PDA Enumerate ID Programming Mode, Disable Memory Error Injection

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DDR Power Options Power Down Enable Configuration options: [Disabled] [Enabled] [Auto] DDR RAS This item allows you to configure DDR RAS. Disable Memory Error Injection Configuration options: [False] [True] [Auto] DDR ECC Configuration DDR Security This item allows you to configure DDR Security. TSME Configuration options: [Auto] [Enabled] [Disabled] Data Scramble Configuration options: [Enabled] [Disabled] [Auto] DDR Addressing Options This item allows you to configure DDR Addressing Options. Chipselect Interleaving Interleave memory blocks across the DRAM chip selects for node 0. Configuration options: [Disabled] [Auto] Address Hash Bank Configuration options: [Disabled] [Enabled] [Auto] Address Hash CS Configuration options: [Auto] [Enabled] [Disabled] Address Hash Subchannel Configuration options: [Auto] [Enabled] [Disabled] BankSwapMode Configuration options: [Auto] [Disabled] [SwapCPU] [Swap APU] DDR Training Options This item allows you to configure DDR Training Options. DFE Read Training Perform 2D Read Training with DFE on. Configuration options: [Auto] [Enable] [Disable] DRAM PDA Enumerate ID Programming Mode Configuration options: [Auto] [Sequential PDA enumeration mode] [Legacy PDA enumeration mode] TX DFE Taps Specifies the number of TX DFE taps. Configuration options: [Auto] [1 Tap] [2 Taps] [3 Taps] [4 Taps] PPT Control Configuration options: [Auto] [Disabled] DDR Memory MBIST This item allows you to configure DDR Memory MBIST. MBIST Enable Allows you to enable or disable Memory MBIST. Configuration options: [Disabled] [Enabled] [Auto] ROG CROSSHAIR X670E Series BIOS Manual 59

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ROG CROSSHAIR X670E Series BIOS Manual
59
DDR Power Options
Power Down Enable
Configuration options: [Disabled] [Enabled] [Auto]
DDR RAS
This item allows you to configure DDR RAS.
Disable Memory Error Injection
Configuration options: [False] [True] [Auto]
DDR ECC Configuration
DDR Security
This item allows you to configure DDR Security.
TSME
Configuration options: [Auto] [Enabled] [Disabled]
Data Scramble
Configuration options: [Enabled] [Disabled] [Auto]
DDR Addressing Options
This item allows you to configure DDR Addressing Options.
Chipselect Interleaving
Interleave memory blocks across the DRAM chip selects for node 0.
Configuration options: [Disabled] [Auto]
Address Hash Bank
Configuration options: [Disabled] [Enabled] [Auto]
Address Hash CS
Configuration options: [Auto] [Enabled] [Disabled]
Address Hash Subchannel
Configuration options: [Auto] [Enabled] [Disabled]
BankSwapMode
Configuration options: [Auto] [Disabled] [SwapCPU] [Swap APU]
DDR Training Options
This item allows you to configure DDR Training Options.
DFE Read Training
Perform 2D Read Training with DFE on.
Configuration options: [Auto] [Enable] [Disable]
DRAM PDA Enumerate ID Programming Mode
Configuration options: [Auto] [Sequential PDA enumeration mode] [Legacy
PDA enumeration mode]
TX DFE Taps
Specifies the number of TX DFE taps.
Configuration options: [Auto] [1 Tap] [2 Taps] [3 Taps] [4 Taps]
PPT Control
Configuration options: [Auto] [Disabled]
DDR Memory MBIST
This item allows you to configure DDR Memory MBIST.
MBIST Enable
Allows you to enable or disable Memory MBIST.
Configuration options: [Disabled] [Enabled] [Auto]