Asus TUWE-M TUWE-M User Manual - Page 56

4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration SDRAM Timing [By SPD] This setting enables the user to adjust optimal timings for items 2-4, which depend on the memory modules that you are using. The default setting [By SPD] configures items 2-4 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical parameter information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Define] [By SPD] NOTE: These 3 fields will only be adjustable when SDRAM Timing is set to [User Define]. SDRAM CAS Latency This controls the latency between the SDRAM read command and the time that the data actually becomes available. SDRAM RAS to CAS Delay This controls the latency between the SDRAM active command and the read/write command. SDRAM RAS Precharge Time This controls the idle clocks after issuing a precharge command to the SDRAM. SDRAM Cycle Time (Tras, Trc) [7T, 9T] This feature controls the number of SDRAM clocks used for SDRAM parameters Tras and Trc. Tras specifies the minimum clocks required between active command and precharge command. Trc specifies the minimum clocks required between active command and re-active command. Configuration options: [5T, 7T] [7T, 9T] 56 ASUS TUWE-M User's Manual