Hitachi HDT725025VLA380 Specifications - Page 83

9.0 Registers 9.1 Register set Table 49: Register Set CS0- Addresses CS1- DA2 DA1 N N x x N A 0 x N A 1 0 N A 1 1 N A 1 1 A N 0 0 A N 0 0 A N 0 1 A N 0 1 A N 0 1 A N 1 0 A N 1 0 A N 1 0 A N 1 0 A N 1 1 A N 1 1 A N 1 1 A A x x Functions DA0 READ (DIOR-) WRITE (DIOW-) x Data bus high impedance Not used Control block registers x Data bus high impedance Not used x Data bus high impedance Not used 0 Alternate Status Device Control 1 Device Address Not used Command block registers 0 Data Data 1 Error Register Features 0 Sector Count Sector Count 1 Sector Number Sector Number 1 * LBA bits 0-7 * LBA bits 0-7 0 Cylinder Low Cylinder Low 0 * LBA bits 8-15 * LBA bits 8-15 1 Cylinder High Cylinder High 1 * LBA bits 16-23 * LBA bits 16-23 0 Device/Head. Device/Head 0 * LBA bits 24-27 * LBA bits 24-27 1 Status Command x Invalid address Invalid address Logic conventions: A = signal asserted N = signal not asserted x = either A or N * = Mapping of registers in LBA mode Communication to or from the device is through an I/O Register that routes the input or output data to or from the registers addressed by the signals from the host(CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW-). The Command Block Registers are used for sending commands to the device or posting status from the device. The Control Block Registers are used for device control and to post alternate status. Deskstar T7K500 Hard Disk Drive Specification 69