Hitachi HDT725025VLA380 Specifications - Page 85
Data Register, Device, Control Register
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9.6 Data Register This register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command and the configuration information is transferred on an Identify Device command. All data transfers are 16 bits wide, except for ECC byte transfers, which are 8 bits wide. Data transfers are PIO only. The register contains valid data only when DRQ = 1 is in the Status Register. 9.7 Device Control Register Table 51: Device Control Register 7 6 5 4 3 2 1 0 HOB - - - 1 SRST -IEN 0 Bit HOB SRST -IEN Definitions HOB (high order byte) is defined by the 48-bit Address feature set. A write to any Command Register shall clear the HOB bit to zero. Software Reset. The device is held at reset when RST = 1. Setting RST = 0 again enables the device. To ensure that the device recognizes the reset, the host must set RST = 1 and wait for at least 5 ms before setting RST = 0. Interrupt Enable. When IEN = 0, and the device is selected, the device interrupts to the host will be enabled. When IEN = 1, or the device is not selected, the device interrupts to the host will be disabled. Deskstar T7K500 Hard Disk Drive Specification 71