IBM 86884RX Installation Guide - Page 18

CPU 1 CPU 2 6.4 GBps CPU 3 CPU 4 400 MHz 64 MB L4 cache 6.4 GBps Processor & cache controller SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SMI-E SMI-E SMI-E SMI-E Port 1 3.2 GBps 3.2 GBps Memory controller Port 2 3.2 GBps 200 MHz 2-way or 4-way interleaved DDR Processor-board assembly RXE Expansion Port A (1 GBps) PCI bridge 66 MHz 66 MHz 33 MHz 1 GBps Bus A Memory-board assembly 1 GBps PCI bridge B-100 C-133 D-133 RXE Expansion Port B (1 GBps) Ultra320 SCSI Gigabit Ethernet Video 3x USB Serial RSA 64-bit 64-bit 64-bit 66 MHz 100 MHz 133 MHz IBM XA-64 ("Summit") core chipset Figure 1-1 xSeries 450 system block diagram What was called the SMP Expansion module in the x440 has been divided into two components in the x450. The component that contains the CPUs, processor/cache controller, and cache is called the processor-board assembly. The component that contains the memory controller and memory is called the memory-board assembly. The CPUs are connected together with a 200 MHz frontside bus, but supply data at an effective rate of 400 MHz using the "dual-pump" design of the Intel Itanium 2 architecture as described in 1.4, "Intel Itanium 2 processor" on page 10. To ensure the processors are optimally used, the x450 has a 64 MB XceL4 Server Accelerator Cache, comprised of 200 MHz DDR memory. This L4 system cache services all CPUs. 4 IBM ^ xSeries 450 Planning and Installation Guide