IBM 86884RX Installation Guide - Page 34

the inoperative memory chip offline while the server keeps running.

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provides an extra level of error recovery capability. (In the x440, the read command is read from the DIMM with the least amount of reported memory errors through memory scrubbing). If memory scrubbing determines the DIMM is damaged beyond use, read and write operations are redirected to the partner DIMM in the other port. Memory scrubbing then reports the damaged DIMM and the light path diagnostics display the error. If memory mirroring is enabled, then the mirrored copy of the data in the damaged DIMM is used until the system is powered down and the DIMM replaced. Certain restrictions exist with respect to placement and size of memory DIMMs when memory mirroring is enabled. These are discussed in "Memory mirroring" on page 42. Chipkill memory Chipkill is integrated into the XA-64 chipset and does not require special Chipkill DIMMs. Chipkill corrects multiple single-bit errors to keep a DIMM from failing. When combining Chipkill with Memory ProteXion and Active Memory, the x450 provides very high reliability in the memory subsystem. Chipkill memory is approximately 100 times more effective than ECC technology, providing correction for up to 4 bits per DIMM, whether on a single chip or multiple chips. If a memory chip error does occur, Chipkill is designed to automatically take the inoperative memory chip offline while the server keeps running. The memory controller provides memory protection similar in concept to disk array striping with parity, writing the memory bits across multiple memory chips on the DIMM. The controller is able to reconstruct the "missing" bit from the failed chip and continue working as usual. Chipkill support is provided in the memory controller and implemented using standard DIMMs, so it is transparent to the operating system. In addition, to maintain the highest levels of system availability, if a memory error is detected during POST or memory configuration, the server can automatically disable the failing memory bank and continue operating with reduced memory capacity. You can manually re-enable the memory bank after the problem is corrected via the Setup menu in BIOS. 20 IBM ^ xSeries 450 Planning and Installation Guide

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20
IBM
^
xSeries 450 Planning and Installation Guide
provides an extra level of error recovery capability. (In the x440, the read
command is read from the DIMM with the least amount of reported memory
errors through memory scrubbing).
If memory scrubbing determines the DIMM is damaged beyond use, read and
write operations are redirected to the partner DIMM in the other port. Memory
scrubbing then reports the damaged DIMM and the light path diagnostics
display the error. If memory mirroring is enabled, then the mirrored copy of the
data in the damaged DIMM is used until the system is powered down and the
DIMM replaced.
Certain restrictions exist with respect to placement and size of memory
DIMMs when memory mirroring is enabled. These are discussed in “Memory
mirroring” on page 42.
±
Chipkill memory
Chipkill is integrated into the XA-64 chipset and does not require special
Chipkill DIMMs. Chipkill corrects multiple single-bit errors to keep a DIMM
from failing. When combining Chipkill with Memory ProteXion and Active
Memory, the x450 provides very high reliability in the memory subsystem.
Chipkill memory is approximately 100 times more effective than ECC
technology, providing correction for up to 4 bits per DIMM, whether on a single
chip or multiple chips.
If a memory chip error does occur, Chipkill is designed to automatically take
the inoperative memory chip offline while the server keeps running. The
memory controller provides memory protection similar in concept to disk array
striping with parity, writing the memory bits across multiple memory chips on
the DIMM. The controller is able to reconstruct the “missing” bit from the failed
chip and continue working as usual.
Chipkill support is provided in the memory controller and implemented using
standard DIMMs, so it is transparent to the operating system.
In addition, to maintain the highest levels of system availability, if a memory error
is detected during POST or memory configuration, the server can automatically
disable the failing memory bank and continue operating with reduced memory
capacity. You can manually re-enable the memory bank after the problem is
corrected via the Setup menu in BIOS.