Intel D845HV Product Guide - Page 75
I/O Map, Table 31.
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I/O Map Table 31. I/O Map Address (hex) 0000 - 000F 0020 - 0021 0040 - 0043 0060 0061 0064 0070 - 0071 0072 - 0073 0080 - 008F 0092 00A0 - 00A1 00B2 - 00B3 00C0 - 00DF 00F0 0170 - 0177 01F0 - 01F7 0228 - 022F* 0278 - 027F* 02E8 - 02EF* 02F8 - 02FF* 0376 0377, bits 6:0 0378 - 037F 03B0 - 03BB 03C0 - 03DF 03E8 - 03EF 03F0 - 03F5 03F6 03F8 - 03FF 04D0 - 04D1 LPTn + 400 0CF8 - 0CFB** 0CF9*** 0CFC - 0CFF FFA0 - FFA7 FFA8 - FFAF Size 16 bytes 2 bytes 4 bytes 1 byte 1 byte 1 byte 2 bytes 2 bytes 16 bytes 1 byte 2 bytes 2 bytes 32 bytes 1 byte 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 1 byte 7 bits 8 bytes 12 bytes 32 bytes 8 bytes 6 bytes 1 byte 8 bytes 2 bytes 8 bytes 4 bytes 1 byte 4 bytes 8 bytes 8 bytes Technical Reference Description DMA controller Programmable Interrupt Control (PIC) System timer Keyboard controller byte-reset IRQ System speaker Keyboard controller, CMD / STAT byte System CMOS / Real Time Clock System CMOS DMA controller Fast A20 and PIC PIC APM control DMA Numeric data processor Secondary IDE channel Primary IDE channel LPT3 LPT2 COM4 / video (8514A) COM2 Secondary IDE channel command port Secondary IDE channel status port LPT1 Video (VGA) Video (VGA) COM3 Diskette channel 1 Primary IDE channel command port COM1 Edge / level triggered PIC ECP port, LPTn base address + 400h PCI configuration address register Turbo and reset control register PCI configuration data register Primary bus master IDE registers Secondary bus master IDE registers continued 75