Intel D865GSA Product Specification - Page 18

Memory Configurations

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Intel Desktop Board D865GSA Technical Product Specification 1.4.1 Memory Configurations The Intel 82865G GMCH component provides two features for enhancing memory throughput: • Dual Channel memory interface. The board has two memory channels, each with a single DIMM socket, as shown in Figure 3 • Dynamic Addressing Mode. Dynamic mode minimizes overhead by reducing memory accesses Table 5 summarizes the characteristics of Dual and Single Channel configurations with and without the use of Dynamic Mode. Table 5. Characteristics of Dual/Single Channel Configuration with/without Dynamic Mode Throughput Level Configuration Characteristics Highest Dual Channel with Dynamic Mode DIMMs matched (Example configuration shown in Figure 4) Single Channel with Dynamic Mode Single DIMM (Example configuration shown in Figure 5) Single Channel without Dynamic Mode DIMMs not matched (Example configuration shown in Figure 6) Lowest Channel A, DIMM 0 Channel B, DIMM 0 Figure 3. Memory Channel Configuration OM18296 18

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Intel Desktop Board D865GSA Technical Product Specification
18
1.4.1
Memory Configurations
The Intel 82865G GMCH component provides two features for enhancing memory
throughput:
•
Dual Channel memory interface.
The board has two memory channels, each with a
single DIMM socket, as shown in Figure 3
•
Dynamic Addressing Mode.
Dynamic mode minimizes overhead by reducing
memory accesses
Table 5 summarizes the characteristics of Dual and Single Channel configurations with
and without the use of Dynamic Mode.
Table 5. Characteristics of Dual/Single Channel Configuration with/without
Dynamic Mode
Throughput
Level
Configuration
Characteristics
Highest
Dual Channel with Dynamic Mode
DIMMs matched
(Example configuration shown in Figure 4)
Single Channel with Dynamic Mode
Single DIMM
(Example configuration shown in Figure 5)
Lowest
Single Channel without Dynamic Mode
DIMMs not matched
(Example configuration shown in Figure 6)
OM18296
Channel A, DIMM 0
Channel B, DIMM 0
Figure 3.
Memory Channel Configuration