LG KM710 Service Manual - Page 38

Pin Description

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3. HW Circuit Description 3.6.2 Pin Description Pin Description CLOCKS/GLOBAL SIGNALS SLOW-CLK_IN 32.768.kHz clock input XTALM Negative fast crystal in XTALP/FAST_CLK_IN Positive fast crystal in/fast clock input RADIO FREQUENCY INTERFACE RFP Receiver/transmit differential RF I/O RFM Receiver/transmit differential RF/IO POWER MANAGEMENT VLDC_OUT Very-low drop-output voltage KA_OUT Keep alive output NSHUT_DOWN Devices shutdown input(active low) also acts as power-on reset POWER SUPPLY VBAT Battery power supply VDD_IO1 Power supply for I/O BB_LDO_OUT1 Baseband LDO output ANA_LDO_OUT Analog LDO output RFIO_LDO_OUT RFIO LDO output, power source for RF elements OSC_LDO_OUT OSC LDO output VDD_IN_BB Baseband LDO input voltage BGAP_V BGAP reference voltage BGAP_I BGAP reference current(used only for test) GROUND VSS Digital ground VSSA Analog ground/RF analog ground I/O NAME AUD_CLK Input-when external codec is configured as master(default configuration) AUD_FSYNC AUD_IN AUD_OUT High Z with PD, except when transmitting voice samples GPIO0 EXT_CLK_REQ_OUT GPIO1 EXT_CLK_REQ_IN HCI UART INTERFACE HCI_RX HCI UART data receive HCI_TX HCI UART data transmit Copyright © 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes - 39 - LGE Internal Use Only

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- 39 -
3. HW Circuit Description
LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc.
All right reserved.
Only for training and service purposes
3.6.2 Pin Description
HCI UART data receive
HCI_RX
HCI UART INTERFACE
High Z with PD, except when transmitting voice samples
AUD_OUT
AUD_IN
AUD_FSYNC
Input-when external codec is configured as master(default
configuration)
AUD_CLK
I/O NAME
Analog ground/RF analog ground
VSSA
Digital ground
VSS
GROUND
BGAP reference current(used only for test)
BGAP_I
EXT_CLK_REQ_OUT
GPIO0
BGAP reference voltage
BGAP_V
EXT_CLK_REQ_IN
GPIO1
Baseband LDO output
BB_LDO_OUT1
Power supply for I/O
VDD_IO1
Battery power supply
VBAT
POWER SUPPLY
Devices shutdown input(active low) also acts as power-on reset
NSHUT_DOWN
Keep alive output
KA_OUT
Very-low drop-output voltage
VLDC_OUT
POWER MANAGEMENT
Receiver/transmit differential RF/IO
RFM
Receiver/transmit differential RF I/O
RFP
RADIO FREQUENCY INTERFACE
Analog LDO output
ANA_LDO_OUT
Positive fast crystal in/fast clock input
XTALP/FAST_CLK_IN
OSC LDO output
OSC_LDO_OUT
32.768.kHz clock input
SLOW-CLK_IN
CLOCKS/GLOBAL SIGNALS
Description
Pin
HCI UART data transmit
HCI_TX
Baseband LDO input voltage
VDD_IN_BB
RFIO LDO output, power source for RF elements
RFIO_LDO_OUT
Negative fast crystal in
XTAL
M