eMachines E627 Service Guide - Page 148

Beeps, For Boot Block in Flash ROM, POST Routine Description, Boot to Full DOS

Page 148 highlights

Code C5h C6h C7h C8h C9h D2h Beeps POST Routine Description PnPnd dual CMOS (optional) Initialize notebook docking (optional) Initialize notebook docking late Force check (optional) Extended checksum (optional) Unknown interrupt Code E0h Beeps For Boot Block in Flash ROM Initialize the chipset E1h Initialize the bridge E2h Initialize the CPU E3h Initialize system timer E4h Initialize system I/O E5h Check force recovery boot E6h Checksum BIOS ROM E7h Go to BIOS E8h Set Huge Segment E9h Initialize Multi Processor EAh Initialize OEM special code EBh Initialize PIC and DMA ECh Initialize Memory type EDh Initialize Memory size EEh Shadow Boot Block EFh System memory test F0h Initialize interrupt vectors F1h Initialize Run Time Clock F2h Initialize video F3h F4h 1 F5h Initialize System Management Mode Output one beep before boot Boot to Mini DOS F6h Clear Huge Segment F7h Boot to Full DOS * If the BIOS detects error 2C, 2E, or 30 (base 512K RAM error), it displays an additional word-bitmap (xxxx) indicating the address line or bits that failed. For example, "2C 0002" means address line 1 (bit one set) has failed. "2E 1020" means data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. Note that error 30 cannot occur on 386SX systems because they have a 16 rather than 32-bit bus. The BIOS also sends the bitmap to the port-80 LED display. It first displays the check point code, followed by a delay, the high-order byte, another delay, and then the low-order byte of the error. It repeats this sequence continuously. 138 Chapter 4

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138
Chapter 4
* If the BIOS detects error 2C, 2E, or 30 (base 512K RAM error), it displays an additional word-bitmap (xxxx)
indicating the address line or bits that failed. For example, "2C 0002" means address line 1 (bit one set) has
failed. "2E 1020" means data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. Note that error
30 cannot occur on 386SX systems because they have a 16 rather than 32-bit bus. The BIOS also sends the
bitmap to the port-80 LED display. It first displays the check point code, followed by a delay, the high-order
byte, another delay, and then the low-order byte of the error. It repeats this sequence continuously.
C5h
PnPnd dual CMOS (optional)
C6h
Initialize notebook docking (optional)
C7h
Initialize notebook docking late
C8h
Force check (optional)
C9h
Extended checksum (optional)
D2h
Unknown interrupt
Code
Beeps
For Boot Block in Flash ROM
E0h
Initialize the chipset
E1h
Initialize the bridge
E2h
Initialize the CPU
E3h
Initialize system timer
E4h
Initialize system I/O
E5h
Check force recovery boot
E6h
Checksum BIOS ROM
E7h
Go to BIOS
E8h
Set Huge Segment
E9h
Initialize Multi Processor
EAh
Initialize OEM special code
EBh
Initialize PIC and DMA
ECh
Initialize Memory type
EDh
Initialize Memory size
EEh
Shadow Boot Block
EFh
System memory test
F0h
Initialize interrupt vectors
F1h
Initialize Run Time Clock
F2h
Initialize video
F3h
Initialize System Management Mode
F4h
1
Output one beep before boot
F5h
Boot to Mini DOS
F6h
Clear Huge Segment
F7h
Boot to Full DOS
Code
Beeps
POST Routine Description