HP rp7440 Installation Guide, Fourth Edition - HP Integrity rx7640 and HP 9000 - Page 19

Central Processor Units, Memory Subsystem, Table 1-1 Cell Board CPU Module Load Order

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Central Processor Units The cell board can hold up to four CPU modules. Each CPU module can contain up to two CPU cores on a single socket. Modules are populated in increments of one. On a cell board, the processor modules must be the same family, type, and clock frequencies. Mixing of different processors on a cell board or partition is not supported. Refer to Table 1-1 for the load order that must be maintained when adding processor modules to the cell board. Refer to Figure 1-8 for the locations on the cell board for installing processor modules. NOTE: Unlike previous HP cell based systems, the HP Integrity rx7640 server cell board does not require that a termination module be installed at the end of an unused FSB. System firmware is allowed to disable an unused FSB in the CC. This enables both sockets of the unused bus to remain unpopulated. Table 1-1 Cell Board CPU Module Load Order Number of CPU Modules Installed Socket 2 1 Empty slot 2 CPU installed 3 CPU installed 4 CPU installed Socket 3 Empty slot Empty slot Empty slot CPU installed Socket 1 Empty slot Empty slot CPU installed CPU installed Socket 0 CPU installed CPU installed CPU installed CPU installed Figure 1-8 CPU Locations on Cell Board Memory Subsystem Figure 1-9 shows a simplified view of the memory subsystem. It consists of two independent access paths, each path having its own address bus, control bus, data bus, and DIMMs . Address and control signals are fanned out through register ports to the synchronous dynamic random access memory (SDRAM) on the DIMMs. The memory subsystem comprises four independent quadrants. Each quadrant has its own memory data bus connected from the cell controller to the two buffers for the memory quadrant. Each quadrant also has two memory control buses; one for each buffer. Detailed Server Description 19

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Central Processor Units
The cell board can hold up to four CPU modules. Each CPU module can contain up to two CPU
cores on a single socket. Modules are populated in increments of one. On a cell board, the
processor modules must be the same family, type, and clock frequencies. Mixing of different
processors on a cell board or partition is not supported. Refer to
Table 1-1
for the load order that
must be maintained when adding processor modules to the cell board. Refer to
Figure 1-8
for
the locations on the cell board for installing processor modules.
NOTE:
Unlike previous HP cell based systems, the HP Integrity rx7640 server cell board does
not require that a termination module be installed at the end of an unused FSB. System firmware
is allowed to disable an unused FSB in the CC. This enables both sockets of the unused bus to
remain unpopulated.
Table 1-1 Cell Board CPU Module Load Order
Socket 0
Socket 1
Socket 3
Socket 2
Number of
CPU Modules
Installed
CPU installed
Empty slot
Empty slot
Empty slot
1
CPU installed
Empty slot
Empty slot
CPU installed
2
CPU installed
CPU installed
Empty slot
CPU installed
3
CPU installed
CPU installed
CPU installed
CPU installed
4
Figure 1-8 CPU Locations on Cell Board
Memory Subsystem
Figure 1-9
shows a simplified view of the memory subsystem. It consists of two independent
access paths, each path having its own address bus, control bus, data bus, and DIMMs . Address
and control signals are fanned out through register ports to the synchronous dynamic random
access memory (SDRAM) on the DIMMs.
The memory subsystem comprises four independent quadrants. Each quadrant has its own
memory data bus connected from the cell controller to the two buffers for the memory quadrant.
Each quadrant also has two memory control buses; one for each buffer.
Detailed Server Description
19