Intel DH61AG Technical Product Specification - Page 57

Table 31., Pin LVDS Connector

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Technical Reference Table 31. 40-Pin LVDS Connector Pin Signal Name 1 ODD_Lane3_P 2 ODD_Lane3_N 3 ODD_Lane2_P 4 ODD_Lane2_N 5 ODD_Lane1_P 6 ODD_Lane1_N 7 ODD_Lane0_P 8 ODD_Lane0_N 9 EVEN_Lane3_P 10 EVEN_Lane3_N 11 EVEN_Lane2_P 12 EVEN_Lane2_N 13 EVEN_Lane1_P 14 EVEN_Lane1_N 15 EVEN_Lane0_P 16 EVEN_Lane0_N 17 EDID_GND 18 LCD_VCC (3.3 V/5 V/12 V) 19 LCD_VCC (3.3 V/5 V/12 V) 20 LCD_VCC (3.3 V/5 V/12 V) Pin 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Signal Name N/C EDID_3.3 V LCD_GND LCD_GND LCD_GND ODD_CLK_P ODD_CLK_N BKLT_GND BKLT_GND BKLT_GND EDID_CLK BKLT_ENABLE BKLT_PWM_DIM EVEN_CLK_P EVEN_CLK_N BKLT_PWR (12 V/19 V) BKLT_PWR (12 V/19 V) BKLT_PWR (12 V/19 V) N/C EDID_DATA NOTE LVDS single-channel output is driven from the ODD signals. 57

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Technical Reference
57
Table 31.
40-Pin LVDS Connector
Pin
Signal Name
Pin
Signal Name
1
ODD_Lane3_P
21
N/C
2
ODD_Lane3_N
22
EDID_3.3 V
3
ODD_Lane2_P
23
LCD_GND
4
ODD_Lane2_N
24
LCD_GND
5
ODD_Lane1_P
25
LCD_GND
6
ODD_Lane1_N
26
ODD_CLK_P
7
ODD_Lane0_P
27
ODD_CLK_N
8
ODD_Lane0_N
28
BKLT_GND
9
EVEN_Lane3_P
29
BKLT_GND
10
EVEN_Lane3_N
30
BKLT_GND
11
EVEN_Lane2_P
31
EDID_CLK
12
EVEN_Lane2_N
32
BKLT_ENABLE
13
EVEN_Lane1_P
33
BKLT_PWM_DIM
14
EVEN_Lane1_N
34
EVEN_CLK_P
15
EVEN_Lane0_P
35
EVEN_CLK_N
16
EVEN_Lane0_N
36
BKLT_PWR (12 V/19 V)
17
EDID_GND
37
BKLT_PWR (12 V/19 V)
18
LCD_VCC (3.3 V/5 V/12 V)
38
BKLT_PWR (12 V/19 V)
19
LCD_VCC (3.3 V/5 V/12 V)
39
N/C
20
LCD_VCC (3.3 V/5 V/12 V)
40
EDID_DATA
NOTE
LVDS single-channel output is driven from the ODD signals.