Intel E5345 Data Sheet - Page 19

Quad-Core Intel® Xeon® Processor 5300 Series Datasheet

19

Electrical Specifications

2.4.2

PLL Power Supply

An on-die PLL filter solution is implemented on the processor. The

V

CCPLL

input is used

to provide power to the on chip PLL of the processor. Please refer to

Table 2-12

for DC

specifications. Refer to the appropriate platform design guidelines for decoupling and

routing guidelines.

2.5

Voltage Identification (VID)

The Voltage Identification (VID) specification for the processor is defined by the

Voltage

Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.0 Design

Guidelines

. The voltage set by the VID signals is the reference VR output voltage to be

delivered to the processor Vcc pins. Please refer to

Table 2-16

for the DC specifications

for these signals. A voltage range is provided in

Table 2-12

and changes with

frequency. The specifications have been set such that one voltage regulator can

operate with all supported frequencies.

Individual processor VID values may be calibrated during manufacturing such that two

devices at the same core frequency may have different default VID settings. This is

reflected by the VID range values provided in

Table 2-3

.

The Quad-Core Intel® Xeon® Processor 5300 Series uses six voltage identification

signals, VID[6:1], to support automatic selection of power supply voltages.

Table 2-3

specifies the voltage level corresponding to the state of VID[6:1]. A ‘1’ in this table

refers to a high voltage level and a ‘0’ refers to a low voltage level. The definition

provided in

Table 2-3

is not related in any way to previous Intel® Xeon® processors or

voltage regulator designs. If the processor socket is empty (VID[6:1] = 111111), or

the voltage regulation circuit cannot supply the voltage that is requested, the voltage

regulator must disable itself. See the

Voltage Regulator Module (VRM) and Enterprise

Voltage Regulator-Down (EVRD) 11.0 Design Guidelines

for further details.

Although the

Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down

(EVRD) 11.0 Design Guidelines

defines VID [7:0], VID 7 and VID 0 are not used on the

Quad-Core Intel® Xeon® Processor 5300 Series. Please refer to the appropriate

platform design guide

for details.

The Quad-Core Intel® Xeon® Processor 5300 Series provide the ability to operate

while transitioning to an adjacent VID and its associated processor core voltage (V

CC

).

This will represent a DC shift in the load line. It should be noted that a low-to-high or

high-to-low voltage state change may result in as many VID transitions as necessary to

reach the target core voltage. Transitions above the specified VID are not permitted.

Table 2-12

includes VID step sizes and DC shift ranges. Minimum and maximum

voltages must be maintained as shown in

Table 2-13

.

The VRM or EVRD utilized must be capable of regulating its output to the value defined

by the new VID. DC specifications for dynamic VID transitions are included in

Table 2-12

.

Power source characteristics must be guaranteed to be stable whenever the supply to

the voltage regulator is stable.

Section	Page
1 Introduction	9
1.1 Terminology	11
1.2 State of Data	13
1.3 References	13
2 Electrical Specifications	15
2.1 Front Side Bus and GTLREF	15
2.2 Power and Ground Lands	16
2.3 Decoupling Guidelines	16
2.3.1 VCC Decoupling	16
2.3.2 VTT Decoupling	16
2.3.3 Front Side Bus AGTL+ Decoupling	17
2.4 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking	17
2.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0])	18
2.4.2 PLL Power Supply	19
2.5 Voltage Identification (VID)	19
2.6 Reserved, Unused, or Test Signals	21
2.7 Front Side Bus Signal Groups	22
2.8 CMOS Asynchronous and Open Drain Asynchronous Signals	24
2.9 Test Access Port (TAP) Connection	24
2.10 Platform Environmental Control Interface (PECI) DC Specifications	24
2.10.1 DC Characteristics	24
2.10.2 Input Device Hysteresis	25
2.11 Mixing Processors	26
2.12 Absolute Maximum and Minimum Ratings	26
2.13 Processor DC Specifications	27
2.13.1 Flexible Motherboard Guidelines (FMB)	27
2.13.2 VCC Overshoot Specification	33
2.13.3 Die Voltage Validation	34
2.14 AGTL+ FSB Specifications	34
3 Mechanical Specifications	39
3.1 Package Mechanical Drawings	39
3.2 Processor Component Keepout Zones	43
3.3 Package Loading Specifications	43
3.4 Package Handling Guidelines	44
3.5 Package Insertion Specifications	44
3.6 Processor Mass Specifications	44
3.7 Processor Materials	44
3.8 Processor Markings	45
3.9 Processor Land Coordinates	45
4 Land Listing	49
4.1 Quad-Core Intel® Xeon® Processor 5300 Series Pin Assignments	49
4.1.1 Land Listing by Land Name	49
4.1.2 Land Listing by Land Number	60
5 Signal Definitions	71
5.1 Signal Definitions	71
6 Thermal Specifications	79
6.1 Package Thermal Specifications	79
6.1.1 Thermal Specifications	79
6.1.2 Thermal Metrology	83
6.2 Processor Thermal Features	84
6.2.1 Thermal Monitor Features	84
6.2.2 Thermal Monitor (TM1)	84
6.2.3 Thermal Monitor 2	85
6.2.4 On-Demand Mode	86
6.2.5 PROCHOT# Signal	87
6.2.6 FORCEPR# Signal	87
6.2.7 THERMTRIP# Signal	88
6.3 Platform Environment Control Interface (PECI)	88
6.3.1 Introduction	88
6.3.2 PECI Specifications	89
7 Features	91
7.1 Power-On Configuration Options	91
7.2 Clock Control and Low Power States	91
7.2.1 Normal State	92
7.2.2 HALT or Extended HALT State	92
7.2.3 Stop-Grant State	94
7.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant Snoop State	94
7.3 Enhanced Intel SpeedStep® Technology	95
8 Boxed Processor Specifications	97
8.1 Introduction	97
8.2 Mechanical Specifications	99
8.2.1 Boxed Processor Heat Sink Dimensions (CEK)	99
8.2.2 Boxed Processor Heat Sink Weight	107
8.2.3 Boxed Processor Retention Mechanism and Heat Sink Support (CEK)	107
8.3 Electrical Requirements	107
8.3.1 Fan Power Supply (Active CEK)	107
8.3.2 Boxed Processor Cooling Requirements	108
8.4 Boxed Processor Contents	109
9 Debug Tools Specifications	111
9.1 Debug Port System Requirements	111
9.2 Target System Implementation	111
9.2.1 System Implementation	111
9.3 Logic Analyzer Interface (LAI)	111
9.3.1 Mechanical Considerations	112

Intel E5345 Data Sheet - Page 19

PLL Power Supply, 2.5 Voltage Identification (VID)

Page 19 highlights