Intel E5345 Data Sheet - Page 20

Table 2-3., Voltage Identification Definition, Electrical Specifications

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Electrical Specifications Table 2-3. Voltage Identification Definition VID6 VID5 VID4 VID3 VID2 VID1 HEX 400 200 100 50 25 12.5 VCC_MAX mV mV mV mV mV mV 7A 1 1 1 1 0 1 0.8500 78 1 1 1 1 0 0 0.8625 76 1 1 1 0 1 1 0.8750 74 1 1 1 0 1 0 0.8875 72 1 1 1 0 0 1 0.9000 70 1 1 1 0 0 0 0.9125 6E 1 1 0 1 1 1 0.9250 6C 1 1 0 1 1 0 0.9375 6A 1 1 0 1 0 1 0.9500 68 1 1 0 1 0 0 0.9625 66 1 1 0 0 1 1 0.9750 64 1 1 0 0 1 0 0.9875 62 1 1 0 0 0 1 1.0000 60 1 1 0 0 0 0 1.0125 5E 1 0 1 1 1 1 1.0250 5C 1 0 1 1 1 0 1.0375 5A 1 0 1 1 0 1 1.0500 58 1 0 1 1 0 0 1.0625 56 1 0 1 0 1 1 1.0750 54 1 0 1 0 1 0 1.0875 52 1 0 1 0 0 1 1.1000 50 1 0 1 0 0 0 1.1125 4E 1 0 0 1 1 1 1.1250 4C 1 0 0 1 1 0 1.1375 4A 1 0 0 1 0 1 1.1500 48 1 0 0 1 0 0 1.1625 46 1 0 0 0 1 1 1.1750 44 1 0 0 0 1 0 1.1875 42 1 0 0 0 0 1 1.2000 40 1 0 0 0 0 0 1.2125 3E 0 1 1 1 1 1 1.2250 HEX VID6 VID5 VID4 VID3 VID2 VID1 400 200 100 50 25 12.5 VCC_MAX mV mV mV mV mV mV 3C 0 1 1 1 1 0 1.2375 3A 0 1 1 1 0 1 1.2500 38 0 1 1 1 0 0 1.2625 36 0 1 1 0 1 1 1.2750 34 0 1 1 0 1 0 1.2875 32 0 1 1 0 0 1 1.3000 30 0 1 1 0 0 0 1.3125 2E 0 1 0 1 1 1 1.3250 2C 0 1 0 1 1 0 1.3375 2A 0 1 0 1 0 1 1.3500 28 0 1 0 1 0 0 1.3625 26 0 1 0 0 1 1 1.3750 24 0 1 0 0 1 0 1.3875 22 0 1 0 0 0 1 1.4000 20 0 1 0 0 0 0 1.4125 1E 0 0 1 1 1 1 1.4250 1C 0 0 1 1 1 0 1.4375 1A 0 0 1 1 0 1 1.4500 18 0 0 1 1 0 0 1.4625 16 0 0 1 0 1 1 1.4750 14 0 0 1 0 1 0 1.4875 12 0 0 1 0 0 1 1.5000 10 0 0 1 0 0 0 1.5125 0E 0 0 0 1 1 1 1.5250 0C 0 0 0 1 1 0 1.5375 0A 0 0 0 1 0 1 1.5500 08 0 0 0 1 0 0 1.5625 06 0 0 0 0 1 1 1.5750 04 0 0 0 0 1 0 1.5875 02 0 0 0 0 0 1 1.6000 00 0 0 0 0 0 0 OFF1 Notes: 1. When the "111111" VID pattern is observed, the voltage regulator output should be disabled. 2. Shading denotes the expected VID range of the Quad-Core Intel® Xeon® Processor 5300 Series. 3. The VID range includes VID transitions that may be initiated by thermal events, assertion of the FORCEPR# signal (see Section 6.2.3), Extended HALT state transitions (see Section 7.2.2), or Enhanced Intel SpeedStep® Technology transitions (see Section 7.3). The Extended HALT state must be enabled for the processor to remain within its specifications. 4. Once the VRM/EVRD is operating after power-up, if either the Output Enable signal is de-asserted or a specific VID off code is received, the VRM/EVRD must turn off its output (the output should go to high impedance) within 500 ms and latch off until power is cycled. 20 Quad-Core Intel® Xeon® Processor 5300 Series Datasheet

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Electrical Specifications
20
Quad-Core Intel® Xeon® Processor 5300 Series Datasheet
Notes:
1.
When the “111111” VID pattern is observed, the voltage regulator output should be disabled.
2.
Shading denotes the expected VID range of the Quad-Core Intel® Xeon® Processor 5300 Series.
3.
The VID range includes VID transitions that may be initiated by thermal events, assertion of the FORCEPR# signal (see
Section 6.2.3
), Extended HALT state transitions (see
Section 7.2.2
), or Enhanced Intel SpeedStep® Technology transitions
(see
Section 7.3
).
The Extended HALT state must be enabled for the processor to remain within its specifications.
4.
Once the VRM/EVRD is operating after power-up, if either the Output Enable signal is de-asserted or a specific VID off code is
received, the VRM/EVRD must turn off its output (the output should go to high impedance) within 500 ms and latch off until
power is cycled.
Table 2-3.
Voltage Identification Definition
HEX
VID6
400
mV
VID5
200
mV
VID4
100
mV
VID3
50
mV
VID2
25
mV
VID1
12.5
mV
V
CC_MAX
HEX
VID6
400
mV
VID5
200
mV
VID4
100
mV
VID3
50
mV
VID2
25
mV
VID1
12.5
mV
V
CC_MAX
7A
1
1
1
1
0
1
0.8500
3C
0
1
1
1
1
0
1.2375
78
1
1
1
1
0
0
0.8625
3A
0
1
1
1
0
1
1.2500
76
1
1
1
0
1
1
0.8750
38
0
1
1
1
0
0
1.2625
74
1
1
1
0
1
0
0.8875
36
0
1
1
0
1
1
1.2750
72
1
1
1
0
0
1
0.9000
34
0
1
1
0
1
0
1.2875
70
1
1
1
0
0
0
0.9125
32
0
1
1
0
0
1
1.3000
6E
1
1
0
1
1
1
0.9250
30
0
1
1
0
0
0
1.3125
6C
1
1
0
1
1
0
0.9375
2E
0
1
0
1
1
1
1.3250
6A
1
1
0
1
0
1
0.9500
2C
0
1
0
1
1
0
1.3375
68
1
1
0
1
0
0
0.9625
2A
0
1
0
1
0
1
1.3500
66
1
1
0
0
1
1
0.9750
28
0
1
0
1
0
0
1.3625
64
1
1
0
0
1
0
0.9875
26
0
1
0
0
1
1
1.3750
62
1
1
0
0
0
1
1.0000
24
0
1
0
0
1
0
1.3875
60
1
1
0
0
0
0
1.0125
22
0
1
0
0
0
1
1.4000
5E
1
0
1
1
1
1
1.0250
20
0
1
0
0
0
0
1.4125
5C
1
0
1
1
1
0
1.0375
1E
0
0
1
1
1
1
1.4250
5A
1
0
1
1
0
1
1.0500
1C
0
0
1
1
1
0
1.4375
58
1
0
1
1
0
0
1.0625
1A
0
0
1
1
0
1
1.4500
56
1
0
1
0
1
1
1.0750
18
0
0
1
1
0
0
1.4625
54
1
0
1
0
1
0
1.0875
16
0
0
1
0
1
1
1.4750
52
1
0
1
0
0
1
1.1000
14
0
0
1
0
1
0
1.4875
50
1
0
1
0
0
0
1.1125
12
0
0
1
0
0
1
1.5000
4E
1
0
0
1
1
1
1.1250
10
0
0
1
0
0
0
1.5125
4C
1
0
0
1
1
0
1.1375
0E
0
0
0
1
1
1
1.5250
4A
1
0
0
1
0
1
1.1500
0C
0
0
0
1
1
0
1.5375
48
1
0
0
1
0
0
1.1625
0A
0
0
0
1
0
1
1.5500
46
1
0
0
0
1
1
1.1750
08
0
0
0
1
0
0
1.5625
44
1
0
0
0
1
0
1.1875
06
0
0
0
0
1
1
1.5750
42
1
0
0
0
0
1
1.2000
04
0
0
0
0
1
0
1.5875
40
1
0
0
0
0
0
1.2125
02
0
0
0
0
0
1
1.6000
3E
0
1
1
1
1
1
1.2250
00
0
0
0
0
0
0
OFF
1