Intel MFS5520VI User Guide - Page 49
Installing DIMMs, DIMM Slot Order
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• In the Mirrored Channel mode, both sockets must simultaneously satisfy the DIMM matching rules on their respective adjacent channels. If the DDR3 DIMMs on adjacent channels of a socket are not identical, the BIOS configures both the processor sockets to default to the Independent Channel mode. If DIMM_D1 and DIMM_E1 are not identical, then the compute module switches to the Independent Channel Mode. Installing DIMMs DIMM slots are numbered as follows: DIMM B2 DIMM A1 DIMM A2 DIMM B1 DIMM C2 DIMM C1 DIMM F1 DIMM F2 DIMM E1 DIMM D2 DIMM D1 DIMM E2 Figure 29. DIMM Slot Order AF003098 Intel® Compute Module MFS5520VI User Guide 35
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Intel
®
Compute Module MFS5520VI User Guide
35
•
In the Mirrored Channel mode, both sockets must simultaneously satisfy the DIMM
matching rules on their respective adjacent channels. If the DDR3 DIMMs on
adjacent channels of a socket are not identical, the BIOS configures both the
processor sockets to default to the Independent Channel mode. If DIMM_D1 and
DIMM_E1 are not identical, then the compute module switches to the Independent
Channel Mode.
Installing DIMMs
DIMM slots are numbered as follows:
Figure 29.
DIMM Slot Order
AF003098
DIMM B2
DIMM A1
DIMM A2
DIMM B1
DIMM C2
DIMM C1
DIMM F1
DIMM F2
DIMM E1
DIMM D2
DIMM D1
DIMM E2