Acer Aspire 9500 Service Guide - Page 81

Beeps, For Boot Block in ROM, POST Routine Description, Initialize system I/O

Page 81 highlights

Code C7h C8h C9h D2h Beeps POST Routine Description Initialize notebook docking late Force check (optional) Extended checksum (optional) Unknown interrupt Code E0h E1h E2h E3h E4h E5h E6h E7h E8h E9h EAh EBh ECh EDh EEh EFh F0h F1h F2h F3h F4h F5h F6h F7h Beeps 1 For Boot Block in ROM Initialize the chipset Initialize the bridge Initialize the CPU Initialize system timer Initialize system I/O Check force recovery boot Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize Multi Processor Initialize OEM special code Initialize PIC and DMA Initialize Memory type Initialize Memory size Shadow Boot Block System memory test Initialize interrupt vectors Initialize Run Time Clock Initialize video Initialize System Management Mode Output one beep before boot Boot to Mini DOS Clear Huge Segment Boot to Full DOS 76 Chapter 4

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76
Chapter 4
C7h
Initialize notebook docking late
C8h
Force check (optional)
C9h
Extended checksum (optional)
D2h
Unknown interrupt
Code
Beeps
For Boot Block in ROM
E0h
Initialize the chipset
E1h
Initialize the bridge
E2h
Initialize the CPU
E3h
Initialize system timer
E4h
Initialize system I/O
E5h
Check force recovery boot
E6h
Checksum BIOS ROM
E7h
Go to BIOS
E8h
Set Huge Segment
E9h
Initialize Multi Processor
EAh
Initialize OEM special code
EBh
Initialize PIC and DMA
ECh
Initialize Memory type
EDh
Initialize Memory size
EEh
Shadow Boot Block
EFh
System memory test
F0h
Initialize interrupt vectors
F1h
Initialize Run Time Clock
F2h
Initialize video
F3h
Initialize System Management Mode
F4h
1
Output one beep before boot
F5h
Boot to Mini DOS
F6h
Clear Huge Segment
F7h
Boot to Full DOS
Code
Beeps
POST Routine Description