Cisco 6509E Supervisor Guide - Page 46

WS-F6K-PFC3BXL Policy Feature Card 3BXL PFC3BXL are not, Eight 1000BASE-X SFP ports - replacement

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Supervisor Engine 32 PISA Chapter 2 Supervisor Engines Table 2-10 Supervisor Engine 32 PISA Features (continued) Feature Uplink ports (PORT 1 through PORT 9) Description • The WS-S32-GE-PISA have nine uplink ports: - Eight 1000BASE-X SFP ports and - One 10/100/1000BASE RJ-45 port. All nine uplink ports can be used at one time. Note The eight 1000BASE-T or 1000BASE-X uplink ports require SFP transceivers to be installed. • The WS-S32-10GE-PISA have three uplink ports: - Two 10-Gigabit XENPAK ports - One 10/100/1000BASE RJ-45 port. All three ports can be used at one time Note The two 10-Gigabit uplink ports require XENPAK transceivers to be installed. Note In chassis configurations where there are redundant supervisor engines installed, the uplink ports on the supervisor engine that is in standby mode are fully functional. Each uplink port has a LINK LED associated with it. Unmarked RJ-45 port The unmarked RJ-45 port, located above the PCMCIA slot, is currently not supported by the software and is disabled. Universal Serial Bus (USB) Two USB 2.0 ports are provided. Currently, they are not enabled. port Uplink port queue structure 1p3q8t/2q8t (Tx/Rx) Buffer size • WS-S32-GE-PISA-9.5 MB per port • WS-S32-10GE-PISA-100 MB per 10-gigabit port Pluggable transceivers supported • WS-SUP32-GE-PISA-Eight 1-GB SFP transceivers are supported. • WS-S32-10GE-PISA-Two 10-GB XENPAK transceivers are supported. Note See Appendix A for a list and a description of the SFP and XENPAK transceivers that are supported. Hardware-based forwarding engine (Policy Feature Card) The PFC3B is installed on both versions of Supervisor Engine 32 PISA Note The WS-F6K-PFC3A Policy Feature Card 3A (PFC3A) and the WS-F6K-PFC3BXL Policy Feature Card 3BXL (PFC3BXL) are not supported. Programmable IP Services Accelerator (PISA) The PISA daughter card replaces the MSFC2A daughter card. The PISA daughter card integrates the MSFC2A functions and provides additional functionality. 2-18 Catalyst 6500 Series Supervisor Engine Guide OL-7397-03

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2-18
Catalyst 6500 Series Supervisor Engine Guide
OL-7397-03
Chapter 2
Supervisor Engines
Supervisor Engine 32 PISA
Uplink ports (PORT 1
through PORT 9)
•
The WS-S32-GE-PISA have nine uplink ports:
–
Eight 1000BASE-X SFP ports and
–
One 10/100/1000BASE RJ-45 port.
All nine uplink ports can be used at one time.
Note
The eight 1000BASE-T or 1000BASE-X uplink ports require SFP
transceivers to be installed.
•
The WS-S32-10GE-PISA have three uplink ports:
–
Two 10-Gigabit XENPAK ports
–
One 10/100/1000BASE RJ-45 port.
All three ports can be used at one time
Note
The two 10-Gigabit uplink ports require XENPAK transceivers to be
installed.
Note
In chassis configurations where there are redundant supervisor engines
installed, the uplink ports on the supervisor engine that is in standby
mode are fully functional.
Each uplink port has a LINK LED associated with it.
Unmarked RJ-45 port
The unmarked RJ-45 port, located above the PCMCIA slot, is currently not
supported by the software and is disabled.
Universal Serial Bus (USB)
port
Two USB 2.0 ports are provided. Currently, they are not enabled.
Uplink port queue structure
(Tx/Rx)
1p3q8t/2q8t
Buffer size
•
WS-S32-GE-PISA—9.5 MB per port
•
WS-S32-10GE-PISA—100 MB per 10-gigabit port
Pluggable transceivers
supported
•
WS-SUP32-GE-PISA—Eight 1-GB SFP transceivers are supported.
•
WS-S32-10GE-PISA—Two 10-GB XENPAK transceivers are supported.
Note
See Appendix A for a list and a description of the SFP and XENPAK
transceivers that are supported.
Hardware-based forwarding
engine (Policy Feature Card)
The PFC3B is installed on both versions of Supervisor Engine 32 PISA
Note
The WS-F6K-PFC3A Policy Feature Card 3A (PFC3A) and the
WS-F6K-PFC3BXL Policy Feature Card 3BXL (PFC3BXL) are not
supported.
Programmable IP Services
Accelerator (PISA)
The PISA daughter card replaces the MSFC2A daughter card. The PISA
daughter card integrates the MSFC2A functions and provides additional
functionality.
Table 2-10
Supervisor Engine 32 PISA Features (continued)
Feature
Description