Dell PowerEdge C5230 Dell Systems Hardware Owners Manual - Page 71

Table 2-7. PEI Phase (continued) Status Code Description 0x2D 0x2E 0x2F Memory initialization. Programming memory timing information Memory initialization. Configuring memory Memory initialization (other). 0x30 0x31 0x32 0x33 Reserved for ASL (see ASL Status Codes section below) Memory Installed CPU post-memory initialization is started CPU post-memory initialization. Cache initialization 0x34 0x35 0x36 CPU post-memory initialization. Application Processor(s) (AP) initialization CPU post-memory initialization. Boot Strap Processor (BSP) selection CPU post-memory initialization. System Management Mode (SMM) initialization 0x37 0x38 0x39 0x3A 0x3B 0x3C Post-Memory North Bridge initialization is started Post-Memory North Bridge initialization (North Bridge module specific) Post-Memory North Bridge initialization (North Bridge module specific) Post-Memory North Bridge initialization (North Bridge module specific) Post-Memory South Bridge initialization is started Post-Memory South Bridge initialization (South Bridge module specific) 0x3D Post-Memory South Bridge initialization (South Bridge module specific) Using the System Setup Program 71