Dell PowerEdge M420 Dell PowerEdge M620 Systems Owner's Manual - Page 32

Mode-Specific Guidelines, Advanced ECC (Lockstep)

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• Populate all sockets with white release tabs first, then black, and then green. • Do not populate the third DIMM socket in a channel with green release tabs, if a quad-rank RDIMM is populated in the first socket with white release tabs. • Populate the sockets by highest rank count in the following order - first in sockets with white release levers, then black, and then green. For example, if you want to mix quad-rank and dual-rank DIMMs, populate quadrank DIMMs in the sockets with white release tabs and dual-rank DIMMs in the sockets with black release tabs. • In a dual-processor configuration, the memory configuration for each processor must be identical. For example, if you populate socket A1 for processor 1, then populate socket B1 for processor 2, and so on. • Memory modules of different sizes can be mixed provided that other memory population rules are followed (for example, 2 GB and 4 GB memory modules can be mixed). • Populate four DIMMs per processor (one DIMM per channel) at a time to maximize performance. • If memory modules with different speeds are installed, they will operate at the speed of the slowest installed memory module(s) or slower depending on system DIMM configuration. • Populate DIMMs based on the following processor-heat sink configurations. Processor Configuration Processor Heat Type (in Sink Watts) Number of DIMMs Maximum System Capacity Reliability, Availability, and Serviceability (RAS) Features Single processor up to 95 W 57 mm 12 12 Single processor 115 W or 130 W 77 mm 10 (Three DIMMs in channels 8 (Two DIMMs per channel) 0 and 3 and two DIMMs in channels 1 and 2) Dual processor Dual processor up to 95 W 115 W or 130 W 57 mm 77 mm 24 24 20 (Three DIMMs in channels 16 (Two DIMMs per channel) 0 and 3 and two DIMMs in channels 1 and 2) Mode-Specific Guidelines Four memory channels are allocated to each processor. The allowable configurations depend on the memory mode selected. NOTE: x4 and x8 DRAM based DIMMs can be mixed providing support for RAS features. However, all guidelines for specific RAS features must be followed. x4 DRAM based DIMMs retain Single Device Data Correction (SDDC) in memory optimized (independent channel) mode. x8 DRAM based DIMMs require Advanced ECC mode to gain SDDC. The following sections provide additional slot population guidelines for each mode. Advanced ECC (Lockstep) Advanced ECC mode extends SDDC from x4 DRAM based DIMMs to both x4 and x8 DRAMs. This protects against single DRAM chip failures during normal operation. Memory installation guidelines: • Memory modules must be identical in size, speed, and technology. • DIMMs installed in memory sockets with white release tabs must be identical and similar rule applies for sockets with black and green release tabs. This ensures that identical DIMMs are installed in matched pairs for example, A1 with A2, A3 with A4, A5 with A6, and so on. NOTE: Advanced ECC with mirroring is not supported. 32

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•
Populate all sockets with white release tabs first, then black, and then green.
•
Do not populate the third DIMM socket in a channel with green release tabs, if a quad-rank RDIMM is populated
in the first socket with white release tabs.
•
Populate the sockets by highest rank count in the following order - first in sockets with white release levers,
then black, and then green. For example, if you want to mix quad-rank and dual-rank DIMMs, populate quad-
rank DIMMs in the sockets with white release tabs and dual-rank DIMMs in the sockets with black release tabs.
•
In a dual-processor configuration, the memory configuration for each processor must be identical. For example,
if you populate socket A1 for processor 1, then populate socket B1 for processor 2, and so on.
•
Memory modules of different sizes can be mixed provided that other memory population rules are followed (for
example, 2 GB and 4 GB memory modules can be mixed).
•
Populate four DIMMs per processor (one DIMM per channel) at a time to maximize performance.
•
If memory modules with different speeds are installed, they will operate at the speed of the slowest installed
memory module(s) or slower depending on system DIMM configuration.
•
Populate DIMMs based on the following processor-heat sink configurations.
Processor
Configuration
Processor
Type (in
Watts)
Heat
Sink
Number of DIMMs
Maximum System Capacity
Reliability, Availability, and
Serviceability (RAS) Features
Single processor
up to 95 W
57 mm
12
12
Single processor
115 W or
130 W
77 mm
10 (Three DIMMs in channels
0 and 3 and two DIMMs in
channels 1 and 2)
8 (Two DIMMs per channel)
Dual processor
up to 95 W
57 mm
24
24
Dual processor
115 W or
130 W
77 mm
20 (Three DIMMs in channels
0 and 3 and two DIMMs in
channels 1 and 2)
16 (Two DIMMs per channel)
Mode-Specific Guidelines
Four memory channels are allocated to each processor. The allowable configurations depend on the memory mode
selected.
NOTE:
x4 and x8 DRAM based DIMMs can be mixed providing support for RAS features. However, all guidelines for
specific RAS features must be followed. x4 DRAM based DIMMs retain Single Device Data Correction (SDDC) in
memory optimized (independent channel) mode. x8 DRAM based DIMMs require Advanced ECC mode to gain
SDDC.
The following sections provide additional slot population guidelines for each mode.
Advanced ECC (Lockstep)
Advanced ECC mode extends SDDC from x4 DRAM based DIMMs to both x4 and x8 DRAMs. This protects against single
DRAM chip failures during normal operation.
Memory installation guidelines:
•
Memory modules must be identical in size, speed, and technology.
•
DIMMs installed in memory sockets with white release tabs must be identical and similar rule applies for
sockets with black and green release tabs. This ensures that identical DIMMs are installed in matched pairs -
for example, A1 with A2, A3 with A4, A5 with A6, and so on.
NOTE:
Advanced ECC with mirroring is not supported.
32