Hitachi HTS541680J9SA00 Specifications - Page 68

DMA Data Transfer Commands, First-parity DMA Commands

Page 68 highlights

Travelstar 5K160 (SATA) Hard Disk Drive Specification Sleep S.M.A.R.T. Disable Operations S.M.A.R.T. Enable/Disable Attribute Autosave S.M.A.R.T. Enable/Disable Automatic Off-line S.M.A.R.T. Enable Operations S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T. Return Status S.M.A.R.T. Save Attribute Values Standby Standby Immediate Execution of these commands involves no data transfer. 13.4 DMA Data Transfer Commands These commands are: Read DMA Read DMA Ext Write DMA Write DMA Ext Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands except that the host initializes the slave-DMA channel prior to issuing the command. The DMA protocol allows high performance multi-tasking operating systems to eliminate processor overhead associated with PIO transfers. Refer HTS5416XXJ9SA00 Final Functional Specification for further details. 13.5 First-parity DMA Commands These commands are: Read FPDMA Queued Write FPDMA Queued Execution of this class of commands includes command queuing and the transfer of one or more blocks of data between the device and the host. The protocol is described in the section 4.2 "Native Command Queuing" of "Serial ATA II: Extensions to Serial ATA 1.0a". 68/167

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Travelstar 5K160 (SATA) Hard Disk Drive Specification
68/167
z
Sleep
z
S.M.A.R.T. Disable Operations
z
S.M.A.R.T. Enable/Disable Attribute Autosave
z
S.M.A.R.T. Enable/Disable Automatic Off-line
z
S.M.A.R.T. Enable Operations
z
S.M.A.R.T. Execute Off-line Immediate
z
S.M.A.R.T. Return Status
z
S.M.A.R.T. Save Attribute Values
z
Standby
z
Standby Immediate
Execution of these commands involves no data transfer.
13.4
DMA Data Transfer Commands
These commands are:
z
Read DMA
z
Read DMA Ext
z
Write DMA
z
Write DMA Ext
Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands
except that the host initializes the slave-DMA channel prior to issuing the command.
The DMA protocol allows high performance multi-tasking operating systems to eliminate processor
overhead associated with PIO transfers.
Refer HTS5416XXJ9SA00 Final Functional Specification for further details.
13.5
First-parity DMA Commands
These commands are:
z
Read FPDMA Queued
z
Write FPDMA Queued
Execution of this class of commands includes command queuing and the transfer of one or more
blocks of data between the device and the host.
The protocol is described in the section 4.2 “Native
Command Queuing” of “Serial ATA II: Extensions to Serial ATA 1.0a”.