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Intel Q9300 Data Sheet - Page 54

Datasheet, Power/Other, VSS_MB, REGULATION, Output, VSS_SENSE, VTT_OUT_LE, VTT_OUT_RI, VTT_SEL

UPC - 675900938236

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Land Listing and Signal Descriptions Table 4-1. Alphabetical Land Assignments Land Name Land # Signal Buffer Type VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_MB_ REGULATION VSS_SENSE VSSA VTT VTT VTT VTT VTT VTT VTT V28 V29 V3 V30 V6 V7 W4 W7 Y2 Y5 Y7 AN6 AN4 B23 B25 B26 B27 B28 B29 B30 A25 Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Direction Output Output Table 4-1. Alphabetical Land Assignments Land Name Land # Signal Buffer Type VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT_OUT_LE FT VTT_OUT_RI GHT VTT_SEL A26 A27 A28 A29 A30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 D30 J1 AA1 F27 Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Direction Output Output Output 54 Datasheet

Section	Page
Intel® Core™2 Extreme Processor QX9000D Series, Intel® Core™2 Quad Processor Q9000D, Q9000SD, Q8000D, and Q8000SD Series	1
Contents	3
Figures	5
Tables	6
Revision History	7
Intel® Core™2 Extreme Processor QX9000 Series and Intel® Core™2 Quad Processor Q9000, Q9000S, Q8000, Q8000S Series Features	9
1 Introduction	11
1.1 Terminology	12
1.1.1 Processor Terminology Definitions	12
1.2 References	14
2 Electrical Specifications	15
2.1 Power and Ground Lands	15
2.2 Decoupling Guidelines	15
2.2.1 VCC Decoupling	15
2.2.2 Vtt Decoupling	15
2.2.3 FSB Decoupling	16
2.3 Voltage Identification	16
2.4 Reserved, Unused, and TESTHI Signals	18
2.5 Power Segment Identifier (PSID)	18
2.6 Voltage and Current Specification	19
2.6.1 Absolute Maximum and Minimum Ratings	19
2.6.2 DC Voltage and Current Specification	20
2.6.3 VCC Overshoot	25
2.6.4 Die Voltage Validation	25
2.7 Signaling Specifications	26
2.7.1 FSB Signal Groups	26
2.7.2 CMOS and Open Drain Signals	28
2.7.3 Processor DC Specifications	28
2.7.3.1 Platform Environment Control Interface (PECI) DC Specifications	29
2.7.3.2 GTL+ Front Side Bus Specifications	30
2.8 Clock Specifications	31
2.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking	31
2.8.2 FSB Frequency Select Signals (BSEL[2:0])	32
2.8.3 Phase Lock Loop (PLL) and Filter	32
2.8.4 BCLK[1:0] Specifications	32
3 Package Mechanical Specifications	35
3.1 Package Mechanical Drawing	35
3.2 Processor Component Keep-Out Zones	39
3.3 Package Loading Specifications	39
3.4 Package Handling Guidelines	39
3.5 Package Insertion Specifications	40
3.6 Processor Mass Specification	40
3.7 Processor Materials	40
3.8 Processor Markings	40
4 Land Listing and Signal Descriptions	43
4.1 Processor Land Assignments	43
4.2 Alphabetical Signals Reference	64
5 Thermal Specifications and Design Considerations	75
5.1 Processor Thermal Specifications	75
5.1.1 Thermal Specifications	75
5.1.2 Thermal Metrology	81
5.2 Processor Thermal Features	81
5.2.1 Thermal Monitor	81
5.2.2 Thermal Monitor 2	82
5.2.3 On-Demand Mode	83
5.2.4 PROCHOT# Signal	84
5.2.5 THERMTRIP# Signal	84
5.3 Platform Environment Control Interface (PECI)	85
5.3.1 Introduction	85
5.3.1.1 TCONTROL and TCC activation on PECI-Based Systems	85
5.3.2 PECI Specifications	86
5.3.2.1 PECI Device Address	86
5.3.2.2 PECI Command Support	86
5.3.2.3 PECI Fault Handling Requirements	86
5.3.2.4 PECI GetTemp0() Error Code Support	86
6 Features	87
6.1 Power-On Configuration Options	87
6.2 Clock Control and Low Power States	87
6.2.1 Normal State	88
6.2.2 HALT and Extended HALT Powerdown States	88
6.2.2.1 HALT Powerdown State	88
6.2.2.2 Extended HALT Powerdown State	89
6.2.3 Stop Grant and Extended Stop Grant States	89
6.2.3.1 Stop-Grant State	89
6.2.3.2 Extended Stop Grant State	90
6.2.4 Extended HALT Snoop State, HALT Snoop State, Extended Stop Grant Snoop State, and Stop Grant Snoop State	90
6.2.4.1 HALT Snoop State, Stop Grant Snoop State	90
6.2.4.2 Extended HALT Snoop State, Extended Stop Grant Snoop State	90
6.2.5 Sleep State	90
6.2.6 Deep Sleep State	91
6.2.7 Deeper Sleep State	91
6.2.8 Enhanced Intel SpeedStep® Technology	92
6.3 Processor Power Status Indicator (PSI) Signal	92
7 Boxed Processor Specifications	93
7.1 Introduction	93
7.2 Mechanical Specifications	94
7.2.1 Boxed Processor Cooling Solution Dimensions	94
7.2.2 Boxed Processor Fan Heatsink Weight	95
7.2.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly	95
7.3 Electrical Requirements	95
7.3.1 Fan Heatsink Power Supply	95
7.4 Thermal Specifications	97
7.4.1 Boxed Processor Cooling Requirements	97
7.4.2 Variable Speed Fan	98
7.5 Boxed Intel® Core™2 Extreme Processor QX9650 Specifications	99
7.5.1 Boxed Intel® Core™2 Extreme Processor QX9650 Fan Heatsink Weight	100
8 Debug Tools Specifications	103
8.1 Logic Analyzer Interface (LAI)	103
8.1.1 Mechanical Considerations	103

Match case Limit results 1 per page

Land Listing and Signal Descriptions

Datasheet

VSS

V28

Power/Other

VSS

V29

Power/Other

VSS

Power/Other

VSS

V30

Power/Other

VSS

Power/Other

VSS

Power/Other

VSS

Power/Other

VSS

Power/Other

VSS

Power/Other

VSS

Power/Other

VSS

Power/Other

VSS_MB_

REGULATION

AN6

Power/Other

Output

VSS_SENSE

AN4

Power/Other

Output

VSSA

B23

Power/Other

VTT

B25

Power/Other

VTT

B26

Power/Other

VTT

B27

Power/Other

VTT

B28

Power/Other

VTT

B29

Power/Other

VTT

B30

Power/Other

VTT

A25

Power/Other

Table 4-1.

Alphabetical Land

Assignments

Land Name

Land #

Signal Buffer

Type

Direction

VTT

A26

Power/Other

VTT

A27

Power/Other

VTT

A28

Power/Other

VTT

A29

Power/Other

VTT

A30

Power/Other

VTT

C25

Power/Other

VTT

C26

Power/Other

VTT

C27

Power/Other

VTT

C28

Power/Other

VTT

C29

Power/Other

VTT

C30

Power/Other

VTT

D25

Power/Other

VTT

D26

Power/Other

VTT

D27

Power/Other

VTT

D28

Power/Other

VTT

D29

Power/Other

VTT

D30

Power/Other

VTT_OUT_LE

Power/Other

Output

VTT_OUT_RI

GHT

AA1

Power/Other

Output

VTT_SEL

F27

Power/Other

Output

Table 4-1.

Alphabetical Land

Assignments

Land Name

Land #

Signal Buffer

Type

Direction