MSI 970A User Guide - Page 55

Chapter 2 MS-7693 ▶ DRAM Frequency This item allows you to adjust the DRAM frequency. ▶ Adjusted DRAM Frequency It shows the adjusted DRAM frequency. Read-only. ▶ DRAM Timing Mode Select whether DRAM timing is controlled by the SPD (Serial Presence Detect) EEPROM on the DRAM module. Setting to [Auto] enables DRAM timings and the following "Advanced DRAM Configuration" sub-menu to be determined by BIOS based on the configurations on the SPD. Selecting [Link] or [Unlink] allows users to configure the DRAM timings for each channel and the following related "Advanced DRAM Configuration" sub-menu manually. ▶ Advanced DRAM Configuration Press to enter the sub-menu. ▶ Command Rate This setting controls the DRAM command rate. ▶ tCL Controls CAS latency which determines the timing delay (in clock cycles) of starting a read command after receiving data. ▶ tRCD Determines the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less clock cycles, the faster the DRAM performance. ▶ tRP Controls number of cycles for RAS (row address strobe) to be allowed to pre-charge. If insufficient time is allowed for RAS to accumulate before DRAM refresh, the DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. ▶ tRAS Determines the time RAS (row address strobe) takes to read from and write to memory cell. ▶ tRFC This setting determines the time RFC takes to read from and write to a memory cell. ▶ tWR Determines minimum time interval between end of write data burst and the start of a pre-charge command. Allows sense amplifiers to restore data to cell. ▶ tWTR Determines minimum time interval between the end of write data burst and the start of a column-read command; allows I/O gating to overdrive sense amplifies before read command starts. 2-13