Sony MZ-R50 Service Manual - Page 35

Diagrams - description

Page 35 highlights

SECTION 6 DIAGRAMS 6-1. EXPLANATION OF IC TERMINALS IC503 DIGITAL SERVO, ATRAC (CXD2652AR) Pin No. Pin name I/O Description 1 MNT 0 2 MNT 1 3 MNT 2 4 MNT 3 5 SWDT 6 SCLK 7 XLAT 8 SRDT 9 SENS 10 XRST 11 SQSY 12 DQSY 13 WRPWR 14 NC 15 TX 16 17 18 19 20 21 22 23 24 25 26 27 28 29 - 39 40 41 42 43 44 45 46 - 49 50 51 52 53 54 55 OSC1 OSC0 XTSL NC RVSS DIN NC ADDT DATA ALRCK ABCK FS256 DVDD A00 - A08, A10, A11 DVSS XOE XCAS A09 XRAS XWE D0 - D3 MVCI ASYO ASYI AVDD BIAS RFI O Traverse count signal output. O Track jump detect output. - Not used (Open). - Not used (Open). I Inputs write data signal from system controller (IC801). I Inputs serial clock signal from system controller (IC801). I Inputs serial latch signal from system controller (IC801). O Outputs write data signal to system controller (IC801). O Outputs internal status (SENSE) to system controller (IC801). I Inputs reset signal from system controller (IC801). Reset : L O Output subcode Q sync (SCOR) to system controller (IC801). Outputs "L" every 13.3msec. Outputs "H" at all most mostly. O Outputs digital-in U-bit CD format subcode Q sync (SCOR) to system controller (IC801). Outputs "L" every 13.3msec. Outputs "H" at all most mostly. I Inputs laser power switching signal from system controller (IC801). - Not used (Open). I Input of write data taransmission timing from system controller (IC801). Also used as magnetic field head ON/OFF output. O Clock output (22.5MHz). I Clock input (22.5MHz). - Not used (Fixed at "L") - Not used (Ground). - Connect to ground. I Digital audio signal input pin (For optical input). - Not used (Open). I Audio data input from A/D converter (IC303). O Monitor/decode audio data output to A/D converter (IC303). O L/R clock output to D/A converter (IC303). O Bit clock signal output to A/D, D/A converter (IC303). O 11.2896MHz clock output (MCLK). - Power supply (+2.8V) for digital. O Address signal output to RAM (IC509). - Ground terminal. O Output enable contol signal output to RAM (IC509). O Column address strobe singal output to RAM (IC509). O Address signal output to RAM (IC509). O Row address strobe signal output to RAM (IC509). O Read/write control signal output to RAM (IC509). I Data signal input from RAM (IC509). - Not used (Connect to ground). O Playback EFM full-swing output (L : VSS, H : VDD). I Playback EFM asymmetry comparate voltage input. - Power supply (+2.8V) for analog. I Playback EFM asymmetry circuit constant current input. I Inputs playback EFM RF signal from RF amplifier (IC501). - 35 -

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– 35 –
Pin No.
Pin name
I/O
Description
1
MNT 0
O
Traverse count signal output.
2
MNT 1
O
Track jump detect output.
3
MNT 2
Not used (Open).
4
MNT 3
Not used (Open).
5
SWDT
I
Inputs write data signal from system controller (IC801).
6
SCLK
I
Inputs serial clock signal from system controller (IC801).
7
XLAT
I
Inputs serial latch signal from system controller (IC801).
8
SRDT
O
Outputs write data signal to system controller (IC801).
9
SENS
O
Outputs internal status (SENSE) to system controller (IC801).
10
XRST
I
Inputs reset signal from system controller (IC801).
Reset : L
11
SQSY
O
Output subcode Q sync (SCOR) to system controller (IC801).
Outputs “L” every 13.3msec. Outputs “H” at all most mostly.
12
DQSY
O
Outputs digital-in U-bit CD format subcode Q sync (SCOR) to system controller (IC801).
Outputs “L” every 13.3msec. Outputs “H” at all most mostly.
13
WRPWR
I
Inputs laser power switching signal from system controller (IC801).
14
NC
Not used (Open).
15
TX
I
Input of write data taransmission timing from system controller (IC801).
Also used as magnetic field head ON/OFF output.
16
OSC1
O
Clock output (22.5MHz).
17
OSC0
I
Clock input (22.5MHz).
18
XTSL
Not used (Fixed at “L”)
19
NC
Not used (Ground).
20
RV
SS
Connect to ground.
21
DIN
I
Digital audio signal input pin (For optical input).
22
NC
Not used (Open).
23
ADDT
I
Audio data input from A/D converter (IC303).
24
DATA
O
Monitor/decode audio data output to A/D converter (IC303).
25
ALRCK
O
L/R clock output to D/A converter (IC303).
26
ABCK
O
Bit clock signal output to A/D, D/A converter (IC303).
27
FS256
O
11.2896MHz clock output (MCLK).
28
DV
DD
Power supply (+2.8V) for digital.
29 – 39
A00 – A08, A10, A11
O
Address signal output to RAM (IC509).
40
DV
SS
Ground terminal.
41
XOE
O
Output enable contol signal output to RAM (IC509).
42
XCAS
O
Column address strobe singal output to RAM (IC509).
43
A09
O
Address signal output to RAM (IC509).
44
XRAS
O
Row address strobe signal output to RAM (IC509).
45
XWE
O
Read/write control signal output to RAM (IC509).
46 – 49
D0 – D3
I
Data signal input from RAM (IC509).
50
MVCI
Not used (Connect to ground).
51
ASYO
O
Playback EFM full-swing output (L : VSS, H : VDD).
52
ASYI
I
Playback EFM asymmetry comparate voltage input.
53
AV
DD
Power supply (+2.8V) for analog.
54
BIAS
I
Playback EFM asymmetry circuit constant current input.
55
RFI
I
Inputs playback EFM RF signal from RF amplifier (IC501).
SECTION 6
DIAGRAMS
6-1. EXPLANATION OF IC TERMINALS
IC503
DIGITAL SERVO, ATRAC (CXD2652AR)