AMD AX2000DMT3C User Guide - Page 55
Signal and Power-Up Requirements, 8.1 Power-Up Requirements, Signal Sequence and Timing Description
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24309E-March 2002 Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 8 Signal and Power-Up Requirements The AMD Athlon™ XP processor model 6 is designed to provide functional operation if the voltage and temperature parameters are within the limits of normal operating ranges. 8.1 Power-Up Requirements Signal Sequence and Timing Description Figure 12 shows the relationship between key signals in the system during a power-up sequence. This figure details the requirements of the processor. 3.3 V Supply VCCA (2.5 V) (for PLL) VCC_CORE (Processor Core) RESET# NB_RESET# PWROK FID[3:0] System Clock 2 1 6 4 5 7 3 Warm reset condition 8 Figure 12. Signal Relationship Requirements During Power-Up Sequence Note: 1. Figure 12 represents several signals generically by using names not necessarily consistent with any pin lists or schematics. 2. Requirements 1-8 in Figure 12 are described in "Power-Up Timing Requirements" on page 44. Chapter 8 Signal and Power-Up Requirements 43