AMD AX2000DMT3C User Guide - Page 89

Appendix

Get AMD AX2000DMT3C - Athlon XP 1.67 GHz Processor PDF manuals and user guides View all AMD AX2000DMT3C manuals
Add to My Manuals
Save this manual to your list of manuals

Page 89 highlights

24309E-March 2002 Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet Appendix A Conventions and Abbreviations This section contains information about the conventions and abbreviations used in this document. Signals and Bits ■ Active-Low Signals-Signal names containing a pound sign, such as SFILL#, indicate active-Low signals. They are asserted in their Low-voltage state and negated in their High-voltage state. When used in this context, High and Low are written with an initial upper case letter. ■ Signal Ranges-In a range of signals, the highest and lowest signal numbers are contained in brackets and separated by a colon (for example, D[63:0]). ■ Reserved Bits and Signals-Signals or bus bits marked reserved must be driven inactive or left unconnected, as indicated in the signal descriptions. These bits and signals are reserved by AMD for future implementations. When software reads registers with reserved bits, the reserved bits must be masked. When software writes such registers, it must first read the register and change only the non-reserved bits before writing back to the register. ■ Three-State-In timing diagrams, signal ranges that are high impedance are shown as a straight horizontal line half-way between the high and low levels. Appendix A 77

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
24309E—March 2002
AMD Athlon™ XP Processor Model 6 Data Sheet
Preliminary Information
Appendix A
77
Appendix A
Conventions and
Abbreviations
This section contains information about the conventions and
abbreviations used in this document.
Signals and Bits
■
Active-Low Signals—Signal names containing a pound sign,
such as SFILL#, indicate active-Low signals. They are
asserted in their Low-voltage state and negated in their
High-voltage state. When used in this context, High and Low
are written with an initial upper case letter.
■
Signal Ranges—In a range of signals, the highest and lowest
signal numbers are contained in brackets and separated by a
colon (for example, D[63:0]).
■
Reserved Bits and Signals—Signals or bus bits marked
reserved
must be driven inactive or left unconnected, as
indicated in the signal descriptions. These bits and signals
are reserved by AMD for future implementations. When
software reads registers with reserved bits, the reserved bits
must be masked. When software writes such registers, it
must
first
read
the
register
and
change
only
the
non-reserved bits before writing back to the register.
■
Three-State—In timing diagrams, signal ranges that are
high impedance are shown as a straight horizontal line
half-way between the high and low levels.