Campbell Scientific CSAT3 CSAT3 3-D Sonic Anemometer - Page 67

Appendix D. SDM Communications and, Long Signal Cables

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Appendix D. SDM Communications and Long Signal Cables D.1 Brief Description of SDM Clock Rates The fastest rate that a datalogger and SDM sensors can communicate via the SDM bus is determined by the number of SDM sensors connected to the SDM bus, properties of the cable used to connect the sensors (resistance and capacitance), and the scan interval. This rate, called the SDM clock rate, has been optimized for the standard 7.62 m (25 ft.) SDM signal and power cable supplied with the CSAT3. The CSAT3() and SDMTrigger() on the CR3000, CR1000, CR5000, CR800/850, and CR9000(X), and the SDM-CSAT3 (P107) and SDM Group Trigger (P110) on the CR23X, 21X, and CR10(X), use this optimum SDM clock rate by default. For cases when longer lead lengths are required, the SDM clock rate may be slowed down using Instruction SDMSpeed () (CRBasic dataloggers) or Set SDM Clock (P108 for a 21X and P115 for a CR23X and CR10(X)). The SDM Clock rate is changed by entering a bit period for the CRBasic dataloggers or a parameter between 1 and 255, where 1 is the fastest SDM clock rate and 255 is the slowest, for the EDLOG dataloggers. Campbell Scientific has written a datalogger program that will find the appropriate SDM clock rate for a given system configuration. The example programs start with the default SDM clock rate and systematically slow the rate down until there are no SDM communication errors. They then begin to speed up the rate until SDM communications fails. The processes of slowing down and speeding up the SDM clock rate around the fail threshold continues for approximately three minutes. The CRBasic dataloggers output a single data table called "report". The fastest SDM clock rate, that can be used with a particular system setup, can be found from the "All_Fail_Tot" element by selecting the first bit period with zero failures. To provide a safety margin select the next slowest bit period. Test the new SDM clock rate in the datalogger program that will be used during the experiment. The EDLOG dataloggers output three arrays. The first (array ID = 150) is the SDM parameter, the second (array ID = 151) is the number of failures at a SDM parameter as a percent of attempts at that SDM parameter, and the third (array ID = 152) is the number of attempts at a SDM parameter. The fastest SDM clock rate, that can be used with a particular system setup, can be found from the failure array by selecting the first clock parameter with zero failures. To provide a safety margin select the next slowest clock parameter. Test the new SDM clock rate in the datalogger program that will be used during the experiment. Copies of the SDM search programs for the CRBasic and EDLOG dataloggers (Section D.1 and D.2) are available on the Campbell Scientific web site in the Support|Downloads section. Run these programs if the datalogger is having problems communicating with CSAT3 (Section 10.4). D-1

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Appendix D. SDM Communications and
Long Signal Cables
D.1
Brief Description of SDM Clock Rates
The fastest rate that a datalogger and SDM sensors can communicate via the
SDM bus is determined by the number of SDM sensors connected to the SDM
bus, properties of the cable used to connect the sensors (resistance and
capacitance), and the scan interval.
This rate, called the SDM clock rate, has
been optimized for the standard 7.62 m (25 ft.) SDM signal and power cable
supplied with the CSAT3.
The CSAT3() and SDMTrigger() on the CR3000,
CR1000, CR5000, CR800/850, and CR9000(X), and the SDM-CSAT3 (P107)
and SDM Group Trigger (P110) on the CR23X, 21X, and CR10(X), use this
optimum SDM clock rate by default.
For cases when longer lead lengths are
required, the SDM clock rate may be slowed down using Instruction
SDMSpeed () (CRBasic dataloggers) or Set SDM Clock (P108 for a 21X and
P115 for a CR23X and CR10(X)).
The SDM Clock rate is changed by entering
a bit period for the CRBasic dataloggers or a parameter between 1 and 255,
where 1 is the fastest SDM clock rate and 255 is the slowest, for the EDLOG
dataloggers.
Campbell Scientific has written a datalogger program that will find the
appropriate SDM clock rate for a given system configuration.
The example
programs start with the default SDM clock rate and systematically slow the rate
down until there are no SDM communication errors.
They then begin to speed
up the rate until SDM communications fails.
The processes of slowing down
and speeding up the SDM clock rate around the fail threshold continues for
approximately three minutes.
The CRBasic dataloggers output a single data table called “report”.
The fastest
SDM clock rate, that can be used with a particular system setup, can be found
from the “All_Fail_Tot” element by selecting the first bit period with zero
failures.
To provide a safety margin select the next slowest bit period.
Test the
new SDM clock rate in the datalogger program that will be used during the
experiment.
The EDLOG dataloggers output three arrays.
The first (array ID = 150) is the
SDM parameter, the second (array ID = 151) is the number of failures at a
SDM parameter as a percent of attempts at that SDM parameter, and the third
(array ID = 152) is the number of attempts at a SDM parameter.
The fastest
SDM clock rate, that can be used with a particular system setup, can be found
from the failure array by selecting the first clock parameter with zero failures.
To provide a safety margin select the next slowest clock parameter.
Test the
new SDM clock rate in the datalogger program that will be used during the
experiment.
Copies of the SDM search programs for the CRBasic and EDLOG dataloggers
(Section D.1 and D.2) are available on the Campbell Scientific web site in the
Support|Downloads section.
Run these programs if the datalogger is having
problems communicating with CSAT3 (Section 10.4).
D-1