Asus KFN32-D SLI SAS User Guide - Page 83

Memclock Mode [Auto] Sets the memory clock mode. Configuration options: [Auto] [Limit] [Manual] The following item appears when the Memclock Mode is set to Limit or Manual. Memclock Value [200 MHz] Sets the memory clock mode limit. Configuration options: [200 MHz] [266 MHz] [400 MHz] MCT Timing Mode [Auto] Sets the MCT Timing Mode. Configuration options: [Auto] [Manual] Bank Interleaving [Auto] Allows you to enable the bank memory interleaving. Configuration options: [Disabled] [Auto] Enable Clock to All DIMMs [Disabled] Configuration options: [Disabled] [Enabled] DQS Signal Training Control [Enabled] Enables or disables the DQS Signal Timing Training control. Configuration options: [Disabled] [Enabled] MemClk Tristate C3/ALTVID [Disabled] Configuration options: [Disabled] [Enabled] CS Sparing Enable [Disabled] Configuration options: [Disabled] [Enabled] Memory Hole Remapping [Enabled] Enables or disables the memory remapping around memory hole. Configuration options: [Disabled] [Enabled] ECC Configuration The ECC configuration menu allows you to change the ECC settings. ECC Configuration DRAM ECC Enable MCA DRAM ECC Logging ECC Chip Kill DRAM SCRUB REDIRECT DRAM BG Scrub L2 Cache BG Scrub Data Cache BG Scrub [Enabled] [Disabled] [Disabled] [Disabled] [Disabled] [Disabled] [Disabled] ASUS KFN32-D SLI Series DRAM ECC allows hardware to report and correct memory errors automatically maintaining system integrity. Select Screen Select Item +- Change Option F1 General Help F10 Save and Exit ESC Exit 4-23