Asus ME-99 ME-99 User Manual - Page 55

Chip Configuration

Page 55 highlights

4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration (scroll down to see more items, as shown here) SDRAM Configuration [By SPD] This sets the optimal timings of settings for items 2-4, depending on the memory modules that you are using. Default setting is [By SPD], which configures items 2-4 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical parameter information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Define] [7ns (143MHz)] [8ns (125MHz)] [By SPD] SDRAM CAS Latency This controls the latency between SDRAM read command and the time that the data actually becomes available. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. SDRAM RAS to CAS Delay This controls the latency between SDRAM active command and the read/ write command. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. SDRAM RAS Precharge Time This controls the idle clocks after issuing a precharge command to SDRAM. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. Refresh RAS Assertion [5T] Leave on default setting. ASUS ME-99 User's Manual 55

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ASUS ME-99 User’s Manual
55
4.
BIOS SETUP
4.
BIOS SETUP
Chip Configuration
SDRAM Configuration [By SPD]
This sets the optimal timings of settings for items 2–4, depending on the
memory modules that you are using. Default setting is [By SPD], which
configures items 2–4 by reading the contents in the SPD (Serial Presence
Detect) device. The EEPROM on the memory module stores critical pa-
rameter information about the module, such as memory type, size, speed,
voltage interface, and module banks. Configuration options: [User Define]
[7ns (143MHz)] [8ns (125MHz)] [By SPD]
SDRAM CAS Latency
This controls the latency between SDRAM read command and the time that
the data actually becomes available.
NOTE:
To make changes to this field,
the
SDRAM Configuration
field must be set to [User Define].
SDRAM RAS to CAS Delay
This controls the latency between SDRAM active command and the read/
write command.
NOTE:
To make changes to this field, the
SDRAM Con-
figuration
field must be set to [User Define].
SDRAM RAS Precharge Time
This controls the idle clocks after issuing a precharge command to SDRAM.
NOTE:
To make changes to this field, the
SDRAM Configuration
field
must be set to [User Define].
Refresh RAS Assertion [5T]
Leave on default setting.
(scroll down to see more items, as shown here)
4.4.1
Chip Configuration