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HP Dc5850 Technical Reference Guide: HP Compaq dc5850 Series Business Desktop - Page 41

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System Support System Board Connector PCI slot 1 (J20) PIRQ A Table 4-4. PCI Interrupt Distribution System Interrupts PIRQ B PIRQ C PIRQ D PIRQ E PIRQ F A B PIRQ G C PIRQ H D The PCI interrupts can be configured by PCI Configuration Registers 60h..63h to share the standard ISA interrupts (IRQn). ✎ The APIC mode is supported by Windows NT, Windows 2000, and Windows XP, and Windows Vista operating systems. 4.3.2 Direct Memory Access Direct Memory Access (DMA) is a method by which a device accesses system memory without involving the microprocessor. Although the DMA method has been traditionally used to transfer blocks of data to or from an ISA I/O device, PCI devices may also use DMA operation as well. The DMA method reduces the amount of CPU interactions with memory, freeing the CPU for other processing tasks. For detailed information regarding DMA operation, refer to the data manual for the AMD SB700 South Bridge. Technical Reference Guide www.hp.com 4-7

Section	Page
Title	1
Table of Contents	3
Chapter 1 Introduction	7
Introduction	7
1.1 About this Guide	7
1.1.1 Online Viewing	7
1.1.2 Hardcopy	7
1.2 Additional Information Sources	7
1.3 Serial Number	8
1.4 Notational Conventions	8
1.4.1 Special Notices	8
1.4.2 Values	8
1.4.3 Ranges	8
1.5 Common Acronyms and Abbreviations	9
Chapter 2 System Overview	17
System Overview	17
2.1 Introduction	17
2.2 Features	18
2.3 System Architecture	20
2.3.1 AMD Processor Support	22
2.3.2 Chipset	22
2.3.3 Support Components	23
2.3.4 System Memory	23
2.3.5 Mass Storage	24
2.3.6 Serial Interface	24
2.3.7 Universal Serial Bus Interface	24
2.3.8 Network Interface Controller	24
2.3.9 Integrated Graphics Processor	25
2.3.10 Audio Subsystem	26
Chapter 3 Processor/Memory	29
Processor/Memory Subsystem	29
3.1 Introduction	29
3.2 AMD Processors	30
3.2.1 AMD Processor Overview	30
3.2.2 Processor Changing/Upgrading	30
3.3 Memory Subsystem	31
3.3.1 Memory Loading/Upgrading	32
3.3.2 Memory Mapping and Pre-allocation	33
Chapter 4 System Support	35
System Support	35
4.1 Introduction	35
4.2 PCI Bus Overview	35
4.2.1 PCI 2.3 Bus Operation	35
4.2.2 PCI Express Bus Operation	36
4.2.3 Option ROM Mapping	37
4.2.4 PCI Interrupts	37
4.2.5 PCI Power Management Support	37
4.2.6 PCI Connectors	38
4.3 System Resources	40
4.3.1 Interrupts	40
4.3.2 Direct Memory Access	41
4.4 Real-Time Clock and Configuration Memory	42
4.4.1 Clearing CMOS	42
4.4.2 Standard CMOS Locations	43
4.5 System Management	43
4.5.1 Security Functions	43
4.5.2 Power Management	45
4.5.3 System Status	46
4.5.4 Thermal Sensing and Cooling	46
4.6 Register Map and Miscellaneous Functions	47
4.6.1 System I/O Map	47
4.6.2 GPIO Functions	49
Chapter 5 Input-Output Interfaces	51
Input/Output Interfaces	51
5.1 Introduction	51
5.2 SATA Interfaces	52
5.2.1 SATA Connector	52
5.2.2 AHCI/RAID Support	52
5.3 Diskette Drive Interface	54
5.4 Serial Interface	56
5.5 Parallel Interface Support	57
5.5.1 Standard Parallel Port Mode	57
5.5.2 Enhanced Parallel Port Mode	57
5.5.3 Extended Capabilities Port Mode	57
5.5.4 Parallel Interface Connector	58
5.6 Keyboard/Pointing Device Interface	59
5.6.1 Keyboard Interface Operation	59
5.6.2 Pointing Device Interface Operation	60
5.6.3 Keyboard/Pointing Device Interface Connector	60
5.7 Universal Serial Bus Interface	61
5.7.1 USB Connector	61
5.7.2 USB Cable Data	62
5.8 Audio Subsystem	63
5.8.1 HD Audio Controller	64
5.8.2 HD Audio Link Bus	64
5.8.3 Audio Multistreaming	64
5.8.4 Audio Specifications	65
5.9 Network Interface Controller	66
5.9.1 Wake-On-LAN Support	67
5.9.2 Alert Standard Format Support	67
5.9.3 Power Management Support	67
5.9.4 NIC Connector	68
5.9.5 NIC Specifications	68
Chapter 6 Integrated Graphics Processor	69
Integrated Graphics Processor	69
6.1 Introduction	69
6.2 Functional Description	70
6.3 Upgrading	71
6.4 Monitor Connectors	72
6.4.1 Analog Monitor Connector	72
6.4.2 DVI-D Connector	73
Chapter 7 Power and Signal Distribution	75
Power and Signal Distribution	75
7.1 Introduction	75
7.2 Power Distribution	75
7.2.1 SFF Power Supply	76
7.2.2 MT Power Supply	77
7.2.3 Optional Energy Star Compliant PSUs	78
7.3 Power Control	78
7.3.1 Power Button	78
7.3.2 Wake Up Events	80
7.3.3 Power Management	81
7.4 Signal Distribution	82
Chapter 8 BIOS ROM	85
SYSTEM BIOS	85
8.1 Introduction	85
8.2 ROM Flashing	86
8.2.1 Upgrading	86
8.2.2 Changeable Splash Screen	86
8.3 Boot Functions	87
8.3.1 Boot Device Order	87
8.3.2 Network Boot (F12) Support	87
8.3.3 Memory Detection and Configuration	87
8.3.4 Boot Error Codes	88
8.4 Client Management Functions	89
8.4.1 System ID and ROM Type	91
8.6 USB Legacy Support	92
8.7 Management Functions	92
Appendix A Error Messages and Codes	93
A.1 Introduction	93
A.2 Beep/Power LED Codes	93
A.3 Power-On Self Test (POST) Messages	94
A.4 System Error Messages (1xx-xx)	97
A.5 Memory Error Messages (2xx-xx)	98
A.6 Keyboard Error Messages (30x-xx)	99
A.7 Printer Error Messages (4xx-xx)	100
A.8 Video (Graphics) Error Messages (5xx-xx)	100
A.9 Diskette Drive Error Messages (6xx-xx)	101
A.10 Serial Interface Error Messages (11xx-xx)	102
A.11 Modem Communications Error Messages (12xx-xx)	103
A.12 System Status Error Messages (16xx-xx)	104
A.13 Hard Drive Error Messages (17xx-xx)	105
A.14 Hard Drive Error Messages (19xx-xx)	107
A.15 Video (Graphics) Error Messages (24xx-xx)	108
A.16 Audio Error Messages (3206-xx)	108
A.17 DVD/CD-ROM Error Messages (33xx-xx)	109
A.18 Network Interface Error Messages (60xx-xx)	109
A.19 SCSI Interface Error Messages (65xx-xx, 66xx-xx, 67xx-xx)	110
A.20 Pointing Device Interface Error Messages (8601-xx)	111

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Technical Reference Guide

www.hp.com

4-7

System Support

The PCI interrupts can be configured by PCI Configuration Registers 60h..63h to share the

standard ISA interrupts (IRQn).

✎

The APIC mode is supported by Windows NT, Windows 2000, and Windows XP, and Windows

Vista operating systems.

4.3.2 Direct Memory Access

Direct Memory Access (DMA) is a method by which a device accesses system memory without

involving the microprocessor. Although the DMA method has been traditionally used to transfer

blocks of data to or from an ISA I/O device, PCI devices may also use DMA operation as well.

The DMA method reduces the amount of CPU interactions with memory, freeing the CPU for

other processing tasks. For detailed information regarding DMA operation, refer to the data

manual for the AMD SB700 South Bridge.

Table 4-4.

PCI Interrupt Distribution

System Interrupts

System Board

Connector

PIRQ

PCI slot 1 (J20)