Home » HP Manuals » Desktops » HP dc73 » Manual Viewer

HP dc73 Technical Reference Guide: HP Compaq dc7800 Series Business Desktop Co - Page 86

Power Control

Add to My Manuals
Save this manual to your list of manuals

Page 86 highlights

Power and Signal Distribution 7.3 Power Control The generation of +3, +5, and +12 VDC is controlled digitally with the PS On signal. When the PS On signal is asserted, all DC voltages are produced. When PS On is de-asserted, only auxiliary power (+5 AUX) is generated. The +5 AUX voltage is always produced as long as the system is connected to a live AC source. 7.3.1 Power Button The PS On signal is typically controlled through the Power Button which, when pressed and released, applies a negative (grounding) pulse to the power control logic on the system board. The resultant action of pressing the power button depends on the state and mode of the system at that time and is described as follows: System State Off On, ACPI Disabled On, ACPI Enabled Table 7-4. Power Button Actions Pressed Power Button Results In: Negative pulse, of which the falling edge results in power control logic asserting PS On signal to Power Supply Assembly, which then initializes. ACPI four-second counter is not active. Negative pulse, of which the falling edge causes power control logic to de-assert the PS On signal. ACPI four-second counter is not active. Pressed and Released Under Four Seconds: Negative pulse, of which the falling edge causes power control logic to generate SMI-, set a bit in the SMI source register, set a bit for button status, and start four-second counter. Software should clear the button status bit within four seconds and the Suspend state is entered. If the status bit is not cleared by software in four seconds PS On is de-asserted and the power supply assembly shuts down (this operation is meant as a guard if the OS is hung). Pressed and Held At least Four Seconds Before Release: If the button is held in for at least four seconds and then released, PS On is negated, de-activating the power supply. 7-6 www.hp.com Technical Reference Guide

Section	Page
Title	1
Table of Contents	3
Chapter 1: Introduction	7
1.1 About this Guide	7
1.1.1 Online Viewing	7
1.1.2 Hardcopy	7
1.2 Additional Information Sources	7
1.3 Model Numbering Convention	7
1.4 Serial Number	9
1.5 Notational Conventions	9
1.5.1 Special Notices	9
1.5.2 Values	9
1.5.3 Ranges	9
1.6 Common Acronyms and Abbreviations	10
Chapter 2: System Overview	17
2.1 Introduction	17
2.2 Features	18
2.3 System Architecture	20
2.3.1 Intel Processor Support	22
2.3.2 Chipset	23
2.3.3 Support Components	24
2.3.4 System Memory	24
2.3.5 Mass Storage	25
2.3.6 Serial and Parallel Interfaces	25
2.3.7 Universal Serial Bus Interface	25
2.3.8 Network Interface Controller	25
2.3.9 Graphics Subsystem	26
2.3.10 Audio Subsystem	26
2.4 Specifications	27
Chapter 3: Processor/Memory Subsystem	33
3.1 Introduction	33
3.2 Intel Processors	34
3.2.1 Intel Processor Overview	34
3.2.2 Processor Changing/Upgrading	35
3.3 Memory Subsystem	36
3.3.1 Memory Upgrading	37
3.3.2 Memory Mapping and Pre-allocation	37
Chapter 4: System Support	39
4.1 Introduction	39
4.2 PCI Bus Overview	39
4.2.1 PCI 2.3 Bus Operation	39
4.2.2 PCI Express Bus Operation	41
4.2.3 Option ROM Mapping	42
4.2.4 PCI Interrupts	42
4.2.5 PCI Power Management Support	42
4.2.6 PCI Connectors	43
4.3 System Resources	45
4.3.1 Interrupts	45
4.3.2 Direct Memory Access	46
4.4 Real-Time Clock and Configuration Memory	47
4.4.1 Clearing CMOS	47
4.4.2 Standard CMOS Locations	48
4.5 System Management	48
4.5.1 Security Functions	48
4.5.2 Power Management	50
4.5.3 System Status	51
4.5.4 Thermal Sensing and Cooling	51
4.6 Register Map and Miscellaneous Functions	52
4.6.1 System I/O Map	52
4.6.2 GPIO Functions	53
Chapter 5: Input/Output Interfaces	55
5.1 Introduction	55
5.2 SATA Interface	56
5.3 PATA Interface	57
5.4 Diskette Drive Interface	58
5.5 Serial Interface	60
5.6 Parallel Interface	61
5.6.1 Standard Parallel Port Mode	61
5.6.2 Enhanced Parallel Port Mode	61
5.6.3 Extended Capabilities Port Mode	61
5.6.4 Parallel Interface Connector	62
5.7 Keyboard/Pointing Device Interface	63
5.7.1 Keyboard Interface Operation	63
5.7.2 Pointing Device Interface Operation	64
5.7.3 Keyboard/Pointing Device Interface Connector	64
5.8 Universal Serial Bus Interface	65
5.8.1 USB Connector	65
5.8.2 USB Cable Data	66
5.9 Audio Subsystem	67
5.9.1 HD Audio Controller	68
5.9.2 HD Audio Link Bus	68
5.9.3 Audio Multistreaming	68
5.9.4 Audio Specifications	69
5.10 Network Interface Controller	70
5.10.1 Wake-On-LAN Support	71
5.10.2 Alert Standard Format Support	71
5.10.3 Power Management Support	71
5.10.4 NIC Connector	72
5.10.5 NIC Specifications	72
Chapter 6: Integrated Graphics	73
6.1 Introduction	73
6.2 Functional Description	74
6.3 Display Modes	76
6.4 Upgrading	77
6.5 Monitor Connectors	78
6.5.1 Analog Monitor Connector	78
6.5.2 Digital Monitor Connector	79
Chapter 7: Power and Signal Distribution	81
7.1 Introduction	81
7.2 Power Distribution	81
7.2.1 USDT Power Distribution	81
7.2.2 SFF Power Distribution	82
7.2.3 CMT Power Distribution	84
7.2.4 Energy Star Compliancy	85
7.3 Power Control	86
7.3.1 Power Button	86
7.3.2 Wake Up Events	88
7.3.3 Power Management	89
7.4 Signal Distribution	90
Chapter 8: System BIOS	93
8.1 Introduction	93
8.2 ROM Flashing	94
8.2.1 Upgrading	94
8.2.2 Changeable Splash Screen	94
8.3 Boot Functions	95
8.3.1 Boot Device Order	95
8.3.2 Network Boot (F12) Support	95
8.3.3 Memory Detection and Configuration	95
8.3.4 Boot Error Codes	96
8.4 Client Management Functions	97
8.4.1 System ID and ROM Type	98
8.4.2 Temperature Status	98
8.4.3 Drive Fault Prediction	98
8.5 SMBIOS	99
8.6 USB Legacy Support	100
8.7 Management Engine Functions	100