Intel D925XHY D925XHY Technical Product Specification - Page 28

PCI Express, Connectors, 7 Legacy I/O Controller

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Intel Desktop Board D925XHY Technical Product Specification 1.6 PCI Express* Connectors The board provides the following PCI Express connectors: • One PCI Express x16 connector supporting simultaneous transfer speeds up to 4 GBytes/sec of peak bandwidth per direction and up to 8 GBytes/sec concurrent bandwidth • Two PCI Express x1 connectors. The x1 interfaces support simultaneous transfer speeds up to 250 Mbytes/sec of peak bandwidth per direction and up to 500 MBytes/sec concurrent bandwidth The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the underlying PCI Express architecture is compatible with PCI Conventional compliant operating systems. Additional features of the PCI Express interface includes the following: • Support for the PCI Express enhanced configuration mechanism • Automatic discovery, link training, and initialization • Support for Active State Power Management (ASPM) • SMBus 2.0 support • Wake# signal supporting wake events from ACPI S1, S3, S4, or S5 • Software compatible with the PCI Power Management Event (PME) mechanism defined in the PCI Power Management Specification Rev. 1.1 1.7 Legacy I/O Controller The legacy I/O controller provides the following features: • One serial port • One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port (EPP) support • Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems • PS/2-style mouse and keyboard interfaces • Interface for one 1.44 MB or 2.88 MB diskette drive • Intelligent power management, including a programmable wake-up event interface • PCI Conventional bus power management support The BIOS Setup program provides configuration options for the legacy I/O controller. 1.7.1 Serial Port The board has one serial port connector located on the back panel. The serial port supports data transfers at speeds up to 115.2 kbits/sec with BIOS support. For information about The location of the serial port A connector Refer to Figure 15, page 50 28

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Intel Desktop Board D925XHY Technical Product Specification
28
1.6 PCI Express
*
Connectors
The board provides the following PCI Express connectors:
•
One PCI Express x16 connector supporting simultaneous transfer speeds up to 4 GBytes/sec of
peak bandwidth per direction and up to 8 GBytes/sec concurrent bandwidth
•
Two PCI Express x1 connectors.
The x1 interfaces support simultaneous transfer speeds up to
250 Mbytes/sec of peak bandwidth per direction and up to 500 MBytes/sec concurrent
bandwidth
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems.
Additional features of the PCI Express interface includes the following:
•
Support for the PCI Express enhanced configuration mechanism
•
Automatic discovery, link training, and initialization
•
Support for Active State Power Management (ASPM)
•
SMBus 2.0 support
•
Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
•
Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1
1.7 Legacy I/O Controller
The legacy I/O controller provides the following features:
•
One serial port
•
One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
•
Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
•
PS/2-style mouse and keyboard interfaces
•
Interface for one 1.44 MB or 2.88 MB diskette drive
•
Intelligent power management, including a programmable wake-up event interface
•
PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the legacy I/O controller.
1.7.1
Serial Port
The board has one serial port connector located on the back panel.
The serial port supports data
transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about
Refer to
The location of the serial port A connector
Figure 15, page 50